From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752765AbbF3NoD (ORCPT ); Tue, 30 Jun 2015 09:44:03 -0400 Received: from arroyo.ext.ti.com ([192.94.94.40]:37865 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753595AbbF3Nnx (ORCPT ); Tue, 30 Jun 2015 09:43:53 -0400 Message-ID: <55929E0B.9070704@ti.com> Date: Tue, 30 Jun 2015 09:47:55 -0400 From: Vitaly Andrianov User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.6.0 MIME-Version: 1.0 To: Russell King - ARM Linux CC: Mark Rutland , "grygorii.strashko@ti.com" , "linux-kernel@vger.kernel.org" , Lorenzo Pieralisi , "ssantosh@kernel.org" , "linux-arm-kernel@lists.infradead.org" Subject: Re: [PATCH] keystone: adds cpu_die implementation References: <1435600352-32733-1-git-send-email-vitalya@ti.com> <20150629175223.GC19863@leverpostej> <559191E0.4080808@ti.com> <20150629212814.GE7557@n2100.arm.linux.org.uk> <20150629213737.GF7557@n2100.arm.linux.org.uk> In-Reply-To: <20150629213737.GF7557@n2100.arm.linux.org.uk> Content-Type: text/plain; charset="windows-1252"; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 06/29/2015 05:37 PM, Russell King - ARM Linux wrote: > On Mon, Jun 29, 2015 at 10:28:14PM +0100, Russell King - ARM Linux wrote: >> On Mon, Jun 29, 2015 at 02:43:44PM -0400, Vitaly Andrianov wrote: >>> >>> >>> On 06/29/2015 01:52 PM, Mark Rutland wrote: >>>> On Mon, Jun 29, 2015 at 06:52:32PM +0100, Vitaly Andrianov wrote: >>>>> This commit add cpu_die implementation >>>>> >>>>> Signed-off-by: Vitaly Andrianov >>>>> --- >>>>> >>>>> The discussion of the "keystone: psci: adds cpu_die implementation" commit >>>>> shows that if PCSI is enabled platform code doesn't need that implementation >>>>> at all. Having PSCI commands in DTB should be sufficient. Unfortunately >>>>> Keystone with LPAE enable requires some additional development. >>>> >>>> I don't follow. >>>> >>>> What do you need to implement for LPAE? >>> Hi Mark, >>> >>> The Keystone platform needs to set ttbr1 when it boots secondary core. >>> It is done in the keystone_smp_secondary_initmem(), which is >>> .smp_secondary_init member of the keystone_smp_ops. I couldn't find a way >>> how I can add similar function to psci_smp_ops. >> >> TTBR1 will be set by generic code. You don't need to do anything special >> now that my fixes for TI's horrid physical address space switch are in. >> (you may remember, you tested the patches...) > > Oh, it was Murali who tested it, not yourself. Sorry. Suggest you > dig out the patches either from mainline (they're in Linus' tip) or > ask Murali for them... > Thanks Russell, Excellent. I'll test how it will work using PSCI framework. Regards, Vitaly