From: Jon Hunter <jonathanh@nvidia.com>
To: Mark Rutland <mark.rutland@arm.com>, Kyle Huey <me@kylehuey.com>,
"Stephen Warren" <swarren@wwwdotorg.org>,
Thierry Reding <thierry.reding@gmail.com>,
Alexandre Courbot <gnurou@gmail.com>
Cc: Rob Herring <robh+dt@kernel.org>, Pawel Moll <Pawel.Moll@arm.com>,
"Ian Campbell" <ijc+devicetree@hellion.org.uk>,
Kumar Gala <galak@codeaurora.org>,
Russell King <linux@arm.linux.org.uk>,
"open list:OPEN FIRMWARE AND..." <devicetree@vger.kernel.org>,
moderated list: ARM PORT <linux-arm-kernel@lists.infradead.org>,
"open list:TEGRA ARCHITECTUR..." <linux-tegra@vger.kernel.org>,
open list <linux-kernel@vger.kernel.org>,
"Kyle Huey" <khuey@kylehuey.com>, ;
Subject: Re: [RESEND PATCH v3] ARM: tegra124: pmu support
Date: Fri, 17 Jul 2015 08:58:03 +0100 [thread overview]
Message-ID: <55A8B58B.3040104@nvidia.com> (raw)
In-Reply-To: <20150715093511.GA10239@leverpostej>
On 15/07/15 10:35, Mark Rutland wrote:
> On Mon, Jul 13, 2015 at 06:35:45PM +0100, Kyle Huey wrote:
>> This patch modifies the device tree for tegra124 based devices to enable
>> the Cortex A15 PMU. The interrupt numbers are taken from NVIDIA TRM
>> DP-06905-001_v03p. This patch was tested on a Jetson TK1.
>>
>> Updated for proper ordering and to add interrupt-affinity values.
>>
>> Signed-off-by: Kyle Huey <khuey@kylehuey.com>
>
> This looks sane to me, and as you've tested it the values seem to be
> valid:
>
> Acked-by: Mark Rutland <mark.rutland@arm.com>
FWIW ...
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Stephen, Thierry, Alex,
Can we pick this up now?
Jon
>> ---
>> arch/arm/boot/dts/tegra124.dtsi | 17 +++++++++++++----
>> 1 file changed, 13 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
>> index 13cc7ca..de07d7e 100644
>> --- a/arch/arm/boot/dts/tegra124.dtsi
>> +++ b/arch/arm/boot/dts/tegra124.dtsi
>> @@ -918,31 +918,40 @@
>> #address-cells = <1>;
>> #size-cells = <0>;
>>
>> - cpu@0 {
>> + A15_0: cpu@0 {
>> device_type = "cpu";
>> compatible = "arm,cortex-a15";
>> reg = <0>;
>> };
>>
>> - cpu@1 {
>> + A15_1: cpu@1 {
>> device_type = "cpu";
>> compatible = "arm,cortex-a15";
>> reg = <1>;
>> };
>>
>> - cpu@2 {
>> + A15_2: cpu@2 {
>> device_type = "cpu";
>> compatible = "arm,cortex-a15";
>> reg = <2>;
>> };
>>
>> - cpu@3 {
>> + A15_3: cpu@3 {
>> device_type = "cpu";
>> compatible = "arm,cortex-a15";
>> reg = <3>;
>> };
>> };
>>
>> + pmu {
>> + compatible = "arm,cortex-a15-pmu";
>> + interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
>> + interrupt-affinity = <&A15_0>, <&A15_1>, <&A15_2>, <&A15_3>;
>> + };
>> +
>> thermal-zones {
>> cpu {
>> polling-delay-passive = <1000>;
>> --
>> 1.9.1
>>
next prev parent reply other threads:[~2015-07-17 7:58 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-13 17:35 [RESEND PATCH v3] ARM: tegra124: pmu support Kyle Huey
2015-07-15 9:35 ` Mark Rutland
2015-07-17 7:58 ` Jon Hunter [this message]
2015-07-17 8:59 ` Thierry Reding
2015-07-18 13:54 ` Kyle Huey
2015-07-27 16:46 ` Kyle Huey
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