From: Waiman Long <waiman.long@hp.com>
To: Will Deacon <will.deacon@arm.com>
Cc: linux-arch@vger.kernel.org, peterz@infradead.org,
linux-kernel@vger.kernel.org, paulmck@linux.vnet.ibm.com,
mingo@kernel.org
Subject: Re: [PATCH v4 5/8] locking/qrwlock: implement queue_write_unlock using smp_store_release
Date: Mon, 03 Aug 2015 16:44:40 -0400 [thread overview]
Message-ID: <55BFD2B8.7020509@hp.com> (raw)
In-Reply-To: <1438621351-15912-6-git-send-email-will.deacon@arm.com>
On 08/03/2015 01:02 PM, Will Deacon wrote:
> Since 536fa402221f ("compiler: Allow 1- and 2-byte smp_load_acquire()
> and smp_store_release()"), smp_store_release supports byte accesses, so
> use that in writer unlock and remove the conditional macro override.
>
> Signed-off-by: Will Deacon<will.deacon@arm.com>
> ---
> arch/x86/include/asm/qrwlock.h | 10 ----------
> include/asm-generic/qrwlock.h | 9 +--------
> 2 files changed, 1 insertion(+), 18 deletions(-)
>
> diff --git a/arch/x86/include/asm/qrwlock.h b/arch/x86/include/asm/qrwlock.h
> index a8810bf135ab..c537cbb038a7 100644
> --- a/arch/x86/include/asm/qrwlock.h
> +++ b/arch/x86/include/asm/qrwlock.h
> @@ -2,16 +2,6 @@
> #define _ASM_X86_QRWLOCK_H
>
> #include<asm-generic/qrwlock_types.h>
> -
> -#ifndef CONFIG_X86_PPRO_FENCE
> -#define queued_write_unlock queued_write_unlock
> -static inline void queued_write_unlock(struct qrwlock *lock)
> -{
> - barrier();
> - ACCESS_ONCE(*(u8 *)&lock->cnts) = 0;
> -}
> -#endif
> -
> #include<asm-generic/qrwlock.h>
>
> #endif /* _ASM_X86_QRWLOCK_H */
> diff --git a/include/asm-generic/qrwlock.h b/include/asm-generic/qrwlock.h
> index deb9e8b0eb9e..eb673dde8879 100644
> --- a/include/asm-generic/qrwlock.h
> +++ b/include/asm-generic/qrwlock.h
> @@ -134,21 +134,14 @@ static inline void queued_read_unlock(struct qrwlock *lock)
> atomic_sub(_QR_BIAS,&lock->cnts);
> }
>
> -#ifndef queued_write_unlock
> /**
> * queued_write_unlock - release write lock of a queue rwlock
> * @lock : Pointer to queue rwlock structure
> */
> static inline void queued_write_unlock(struct qrwlock *lock)
> {
> - /*
> - * If the writer field is atomic, it can be cleared directly.
> - * Otherwise, an atomic subtraction will be used to clear it.
> - */
> - smp_mb__before_atomic();
> - atomic_sub(_QW_LOCKED,&lock->cnts);
> + smp_store_release((u8 *)&lock->cnts, 0);
> }
> -#endif
>
> /*
> * Remapping rwlock architecture specific functions to the corresponding
Reviewed-by: Waiman Long <Waiman.Long@hp.com>
next prev parent reply other threads:[~2015-08-03 20:44 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-03 17:02 [PATCH v4 0/8] Add generic support for relaxed atomics Will Deacon
2015-08-03 17:02 ` [PATCH v4 1/8] atomics: add acquire/release/relaxed variants of some atomic operations Will Deacon
2015-08-03 17:26 ` Peter Zijlstra
2015-08-03 18:21 ` Will Deacon
2015-08-03 17:02 ` [PATCH v4 2/8] asm-generic: rework atomic-long.h to avoid bulk code duplication Will Deacon
2015-08-03 17:02 ` [PATCH v4 3/8] asm-generic: add relaxed/acquire/release variants for atomic_long_t Will Deacon
2015-08-03 17:02 ` [PATCH v4 4/8] lockref: remove homebrew cmpxchg64_relaxed macro definition Will Deacon
2015-08-03 17:02 ` [PATCH v4 5/8] locking/qrwlock: implement queue_write_unlock using smp_store_release Will Deacon
2015-08-03 20:44 ` Waiman Long [this message]
2015-08-03 17:02 ` [PATCH v4 6/8] locking/qrwlock: make use of acquire/release/relaxed atomics Will Deacon
2015-08-03 20:49 ` Waiman Long
2015-08-04 11:20 ` Will Deacon
2015-08-03 17:02 ` [PATCH v4 7/8] include/llist: use linux/atomic.h instead of asm/cmpxchg.h Will Deacon
2015-08-03 17:02 ` [PATCH v4 8/8] ARM: atomics: define our SMP atomics in terms of _relaxed operations Will Deacon
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