From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754807AbbIWTXn (ORCPT ); Wed, 23 Sep 2015 15:23:43 -0400 Received: from eu-smtp-delivery-143.mimecast.com ([207.82.80.143]:7398 "EHLO eu-smtp-delivery-143.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753007AbbIWTXl convert rfc822-to-8bit (ORCPT ); Wed, 23 Sep 2015 15:23:41 -0400 Subject: Re: [PATCH v2 3/3] irqchip/gicv3-its: Handle OF device tree "msi-map" properties. To: Marc Zyngier , Will Deacon References: <1442966406-13198-1-git-send-email-ddaney.cavm@gmail.com> <1442966406-13198-4-git-send-email-ddaney.cavm@gmail.com> <20150923180100.03844936@arm.com> <5602DC97.1040505@caviumnetworks.com> <20150923175259.GT7356@arm.com> <20150923191834.1764ca02@arm.com> Cc: Mark Rutland , "devicetree@vger.kernel.org" , Jason Cooper , Pawel Moll , Ian Campbell , David Daney , David Daney , "linux-kernel@vger.kernel.org" , Rob Herring , David Daney , Kumar Gala , "grant.likely@linaro.org" , Thomas Gleixner , "linux-arm-kernel@lists.infradead.org" From: Robin Murphy Message-ID: <5602FC39.6090404@arm.com> Date: Wed, 23 Sep 2015 20:23:37 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.2.0 MIME-Version: 1.0 In-Reply-To: <20150923191834.1764ca02@arm.com> X-OriginalArrivalTime: 23 Sep 2015 19:23:37.0631 (UTC) FILETIME=[58BE4AF0:01D0F635] X-MC-Unique: y-XZ-LZoTBKkGxfoIElyTg-1 Content-Type: text/plain; charset=WINDOWS-1252; format=flowed Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 23/09/15 19:18, Marc Zyngier wrote: > On Wed, 23 Sep 2015 18:52:59 +0100 > Will Deacon wrote: > >> On Wed, Sep 23, 2015 at 06:08:39PM +0100, David Daney wrote: >>> On 09/23/2015 10:01 AM, Marc Zyngier wrote: >>>> On Tue, 22 Sep 2015 17:00:06 -0700 >>>> David Daney wrote: >>>> >>>>> From: David Daney >>>>> >>>>> Call of_msi_map_rid() to handle mapping of the requester id. >>>>> >>>>> Signed-off-by: David Daney >>>>> --- >>>>> drivers/irqchip/irq-gic-v3-its-pci-msi.c | 3 ++- >>>>> 1 file changed, 2 insertions(+), 1 deletion(-) >>>>> >>>>> diff --git a/drivers/irqchip/irq-gic-v3-its-pci-msi.c b/drivers/irqchip/irq-gic-v3-its-pci-msi.c >>>>> index cf351c6..8b1c938 100644 >>>>> --- a/drivers/irqchip/irq-gic-v3-its-pci-msi.c >>>>> +++ b/drivers/irqchip/irq-gic-v3-its-pci-msi.c >>>>> @@ -86,7 +86,8 @@ static int its_pci_msi_prepare(struct irq_domain *domain, struct device *dev, >>>>> pci_for_each_dma_alias(pdev, its_get_pci_alias, &dev_alias); >>>>> >>>>> /* ITS specific DeviceID, as the core ITS ignores dev. */ >>>>> - info->scratchpad[0].ul = dev_alias.dev_id; >>>>> + info->scratchpad[0].ul = of_msi_map_rid(dev, domain->of_node, >>>>> + dev_alias.dev_id); >>>>> >>>>> return msi_info->ops->msi_prepare(domain->parent, >>>>> dev, dev_alias.count, info); >>>> >>>> I really wonder if that shouldn't be part of the pci_for_each_dma_alias >>>> call. It would make a lot more sense for this functionality to be an >>>> integral part of the core code, and would probably make the integration >>>> of _IORT (which has the exact same requirements) a bit easier. >>>> >>>> Thoughts? >>>> >>> >>> I am a proponent of pushing things like this as far into the core code >>> as possible. So, from that point of view, I think it would probably be >>> a good idea. >>> >>> I can prepare a patch that does that, but it would also be nice hear >>> from other maintainers and get their thoughts on this. >> >> Hmm, we use pci_for_each_dma_alias in the SMMU drivers to get the SID, >> so I'm not sure that using the MSI mapping is necessarily the right thing >> to do there. Maybe we should instead have dma_alias_to_msi_id helpers or >> something? > > Yes, that's probably a sensible solution. Seconded; take a look at all the additional bus-walking iommu_group_get_for_pci_dev does between the call to pci_for_each_dma_alias and the group = iommu_group_alloc() line - I'd say it's only at the latter point, when there are no aliases found on the PCI side, that it would then need to check the external RID-SID mapping to see if there is any further aliasing downstream of the root complex (and possibly liaise with the IOMMU driver to retrieve an appropriate group, but let's worry about that bit later). Robin. > > M. >