From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932650AbbIXDmv (ORCPT ); Wed, 23 Sep 2015 23:42:51 -0400 Received: from regular1.263xmail.com ([211.150.99.139]:43952 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932352AbbIXDmf (ORCPT ); Wed, 23 Sep 2015 23:42:35 -0400 X-263anti-spam: KSV:0;BIG:0;ABS:1;DNS:0;ATT:0;SPF:S; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 1 X-SKE-CHECKED: 1 X-ADDR-CHECKED: 0 X-RL-SENDER: zhengxing@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: zhengxing@rock-chips.com X-UNIQUE-TAG: X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Message-ID: <5603711F.3070809@rock-chips.com> Date: Thu, 24 Sep 2015 11:42:23 +0800 From: Xing Zheng User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:11.0) Gecko/20120410 Thunderbird/11.0.1 MIME-Version: 1.0 To: =?UTF-8?B?SGVpa28gU3TDvGJuZXI=?= CC: robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 5/9] dt-bindings: add documentation of rk3036 clock controller References: <1442478540-15068-1-git-send-email-zhengxing@rock-chips.com> <1442485969-1733-1-git-send-email-zhengxing@rock-chips.com> <14900712.fB7cIie92H@diego> In-Reply-To: <14900712.fB7cIie92H@diego> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2015年09月17日 23:09, Heiko Stübner wrote: > Am Donnerstag, 17. September 2015, 18:32:49 schrieb Xing Zheng: >> Add the devicetree binding for the cru on the rk3036 which quite similar >> structured as previous clock controllers. >> >> Signed-off-by: Xing Zheng >> --- >> >> Changes in v2: None >> >> .../bindings/clock/rockchip,rk3036-cru.txt | 60 >> ++++++++++++++++++++ 1 file changed, 60 insertions(+) >> create mode 100644 >> Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt >> >> diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt >> b/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt new file >> mode 100644 >> index 0000000..ac3037a >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt >> @@ -0,0 +1,60 @@ >> +* Rockchip RK3036 Clock and Reset Unit >> + >> +The RK3036 clock controller generates and supplies clock to various >> +controllers within the SoC and also implements a reset controller for SoC >> +peripherals. >> + >> +Required Properties: >> + >> +- compatible: should be "rockchip,rk3036-cru" >> +- reg: physical base address of the controller and length of memory mapped >> + region. >> +- #clock-cells: should be 1. >> +- #reset-cells: should be 1. >> + >> +Optional Properties: >> + >> +- rockchip,grf: phandle to the syscon managing the "general register files" >> + If missing pll rates are not changable, due to the missing pll lock >> status. + >> +Each clock is assigned an identifier and client nodes can use this >> identifier +to specify the clock which they consume. All available clocks >> are defined as +preprocessor macros in the dt-bindings/clock/rk3036-cru.h >> headers and can be +used in device tree sources. Similar macros exist for >> the reset sources in +these files. >> + >> +External clocks: >> + >> +There are several clocks that are generated outside the SoC. It is expected >> +that they are defined using standard clock bindings with following >> +clock-output-names: >> + - "xin24m" - crystal input - required, >> + - "xin32k" - rtc clock - optional, > The rk3036 does not seem to use a rtc clock, so this should probably go away Done. >> + - "ext_i2s" - external I2S clock - optional, >> + - "ext_hsadc" - external HSADC clock - optional, >> + - "ext_vip" - external VIP clock - optional, >> + - "ext_isp" - external ISP clock - optional, >> + - "ext_jtag" - external JTAG clock - optional > There do not seem to exist external clock sources for hsadc, vip, isp and jtag > in your clock tree? > > missing here: > - ext_gmac Yes, done. >> + >> +Example: Clock controller node: >> + >> + cru: cru@20000000 { >> + compatible = "rockchip,rk3036-cru"; >> + reg =<0x20000000 0x1000>; >> + rockchip,grf =<&grf>; >> + >> + #clock-cells =<1>; >> + #reset-cells =<1>; >> + }; >> + >> +Example: UART controller node that consumes the clock generated by the >> clock + controller: >> + >> + uart0: serial@20060000 { >> + compatible = "snps,dw-apb-uart"; >> + reg =<0x20060000 0x100>; >> + interrupts =; >> + reg-shift =<2>; >> + reg-io-width =<4>; >> + clocks =<&cru SCLK_UART0>; >> + }; Thanks.