From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754921AbbI3Ih5 (ORCPT ); Wed, 30 Sep 2015 04:37:57 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:24467 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754242AbbI3Ihx (ORCPT ); Wed, 30 Sep 2015 04:37:53 -0400 Subject: Re: [PATCH v2 00/11] Hi Maxime / Patrice / Srini, To: Peter Griffin , , , , References: <1443443867-4099-1-git-send-email-peter.griffin@linaro.org> CC: , From: Maxime Coquelin Message-ID: <560B9F3F.1080701@st.com> Date: Wed, 30 Sep 2015 10:37:19 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.2.0 MIME-Version: 1.0 In-Reply-To: <1443443867-4099-1-git-send-email-peter.griffin@linaro.org> Content-Type: text/plain; charset="windows-1252"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.201.23.80] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:5.14.151,1.0.33,0.0.0000 definitions=2015-09-30_02:2015-09-29,2015-09-30,1970-01-01 signatures=0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Peter, On 09/28/2015 02:37 PM, Peter Griffin wrote: > This series makes a series of updates to the stih407 pinctrl groups > and makes the upstream kernel more closely aligned in terms of pin > configuration to the vendor kernel. > > A number of new periphs are added such as spi fsm, nand, cec0, and > for others such as SPI the various alternate function pin muxings have > been added. Finally for SPI the controller nodes have been updated > to have the default pin assignment in the controller node. > > Changes since v1: > - Rebase on v4.3-rc3 > - Remove some SoBs (Lee) > - Collect up Acks > > kind regards, > > Peter. > > Peter Griffin (11): > ARM: STi: DT: STiH407: Add a cec0 pin definition > ARM: STi: DT: STiH407: Add i2c3 alternate pin configs > ARM: DT: STiH407: Add SPI 3 wire and 4 wire pinctrl configs > ARM: DT: STiH407: Add serial3 pinctrl configuration > ARM: DT: STiH407: Add SPI FSM (NOR Flash) Controller pin config > ARM: DT: STiH407: Add NAND flash controller pin configuration > ARM: DT: STiH407: Add systrace pin configuration > ARM: DT: STiH407: Add SD pinctrl config for mmc0 controller > ARM: DT: STiH407: Add pinconfig for IRB UHF and IRB TX > ARM: DT: STiH407: Add RMII pinctrl support > ARM: STi: STiH407: Add spi default pinctrl groups. > > arch/arm/boot/dts/stih407-family.dtsi | 14 ++ > arch/arm/boot/dts/stih407-pinctrl.dtsi | 378 ++++++++++++++++++++++++++++++++- > 2 files changed, 387 insertions(+), 5 deletions(-) > Series applied to sti-dt-for-v4.4. Thanks! Maxime