From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751347AbbJBCdR (ORCPT ); Thu, 1 Oct 2015 22:33:17 -0400 Received: from mail-io0-f170.google.com ([209.85.223.170]:34775 "EHLO mail-io0-f170.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750988AbbJBCdQ (ORCPT ); Thu, 1 Oct 2015 22:33:16 -0400 Subject: Re: [dpdk-dev] [PATCH 2/2] uio: new driver to support PCI MSI-X To: Stephen Hemminger References: <1443652138-31782-1-git-send-email-stephen@networkplumber.org> <1443652138-31782-3-git-send-email-stephen@networkplumber.org> <560DC45A.3050507@gmail.com> <20151001170452.0e6a90c2@urahara> Cc: hjk@hansjkoch.de, gregkh@linux-foundation.org, dev@dpdk.org, linux-kernel@vger.kernel.org From: Alexander Duyck Message-ID: <560DECE9.8020408@gmail.com> Date: Thu, 1 Oct 2015 19:33:13 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.1.0 MIME-Version: 1.0 In-Reply-To: <20151001170452.0e6a90c2@urahara> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 10/01/2015 05:04 PM, Stephen Hemminger wrote: > On Thu, 1 Oct 2015 16:40:10 -0700 > Alexander Duyck wrote: > >> Do you really need to map IORESOURCE bars? Most drivers I can think of >> don't use IO BARs anymore. Maybe we could look at just dropping the >> code and adding it back later if we have a use case that absolutely >> needs it. > Mapping is not strictly necessary, but for virtio it acts a way to communicate > the regions. I think I see what you are saying. I was hoping we could get away from having to map any I/O ports but it looks like virtio is still using them for BAR 0, or at least that is what I am seeing on my VM with virtio_net. I was really hoping we could get away from that since a 16b address space is far too restrictive anyway. >> Also how many devices actually need resources beyond BAR 0? I'm just >> curious as I know BAR 2 on many of the Intel devices is the register >> space related to MSI-X so now we have both the PCIe subsystem and user >> space with access to this region. > VMXNet3 needs 2 bars. Most use only one. So essentially we are needing to make exceptions for the virtual interfaces. I guess there isn't much we can do then and we probably need to map any and all base address registers we can find for the given device. I was hoping for something a bit more surgical since we are opening a security hole of sorts, but I guess it can't be helped if we want to support multiple devices and they all have such radically different configurations. - Alex