From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755447AbbJGRjk (ORCPT ); Wed, 7 Oct 2015 13:39:40 -0400 Received: from mx1.redhat.com ([209.132.183.28]:36693 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754463AbbJGRjh (ORCPT ); Wed, 7 Oct 2015 13:39:37 -0400 Message-ID: <561558D6.2030909@redhat.com> Date: Wed, 07 Oct 2015 19:39:34 +0200 From: Denys Vlasenko User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.2.0 MIME-Version: 1.0 To: Andy Lutomirski , x86@kernel.org, linux-kernel@vger.kernel.org CC: Brian Gerst , Linus Torvalds , Borislav Petkov Subject: Re: [PATCH v2 07/36] x86/entry/64/compat: After SYSENTER, move STI after the NT fixup References: <35d24d2a9305da3182eab7b2cdfd32902e90962c.1444091584.git.luto@kernel.org> In-Reply-To: <35d24d2a9305da3182eab7b2cdfd32902e90962c.1444091584.git.luto@kernel.org> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 10/06/2015 02:47 AM, Andy Lutomirski wrote: > We eventually want to make it all the way into C code before > enabling interrupts. We need to rework our flags handling slightly > to delay enabling interrupts. > > Signed-off-by: Andy Lutomirski > --- > arch/x86/entry/entry_64_compat.S | 30 ++++++++++++++++++++++-------- > 1 file changed, 22 insertions(+), 8 deletions(-) > > diff --git a/arch/x86/entry/entry_64_compat.S b/arch/x86/entry/entry_64_compat.S > index aa76864a8a6b..1432d60a1f4a 100644 > --- a/arch/x86/entry/entry_64_compat.S > +++ b/arch/x86/entry/entry_64_compat.S > @@ -58,14 +58,9 @@ ENDPROC(native_usergs_sysret32) > * with the int 0x80 path. > */ > ENTRY(entry_SYSENTER_compat) > - /* > - * Interrupts are off on entry. > - * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON, > - * it is too small to ever cause noticeable irq latency. > - */ > + /* Interrupts are off on entry. */ > SWAPGS_UNSAFE_STACK > movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp > - ENABLE_INTERRUPTS(CLBR_NONE) > > /* Zero-extending 32-bit regs, do not remove */ > movl %ebp, %ebp > @@ -76,7 +71,16 @@ ENTRY(entry_SYSENTER_compat) > /* Construct struct pt_regs on stack */ > pushq $__USER32_DS /* pt_regs->ss */ > pushq %rbp /* pt_regs->sp */ > - pushfq /* pt_regs->flags */ > + > + /* > + * Push flags. This is nasty. First, interrupts are currently > + * off, but we need pt_regs->flags to have IF set. Second, even > + * if TF was set when SYSENTER started, it's clear by now. We fix > + * that later using TIF_SINGLESTEP. > + */ > + pushfq /* pt_regs->flags (except IF = 0) */ > + orl $X86_EFLAGS_IF, (%rsp) /* Fix saved flags */ The sequence of "push + insn_using_rsp" is a bit slow on most CPUs because stack engine (the machinery which makes consecutive pushes fast) needs syncronizing with register file. It may be better to move the ORL insn here: push, push, push cld sub $(10*8), %rsp /* pt_regs->r8-11, bp, bx, r12-15 not saved */ + orl $X86_EFLAGS_IF, EFLAGS(%rsp) /* Fix saved flags to have .IF = 1 */ where we already eat that penalty.