From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752024AbbJLMXz (ORCPT ); Mon, 12 Oct 2015 08:23:55 -0400 Received: from mailout2.samsung.com ([203.254.224.25]:38605 "EHLO mailout2.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751346AbbJLMXw (ORCPT ); Mon, 12 Oct 2015 08:23:52 -0400 X-AuditID: cbfee690-f794e6d0000014de-a3-561ba656400a Message-id: <561BA423.6050009@samsung.com> Date: Mon, 12 Oct 2015 17:44:27 +0530 From: Alim Akhtar User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.5.0 MIME-version: 1.0 To: Sylwester Nawrocki , Krzysztof Kozlowski Cc: linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kgene@kernel.org, devicetree@vger.kernel.org, dianders@chromium.org, stable@vger.kernel.org Subject: Re: [PATCH] arm: dts: Fix audio card detection on peach boards References: <1444631169-19468-1-git-send-email-alim.akhtar@samsung.com> <561B578E.1050308@samsung.com> <561B7AFF.1080707@samsung.com> In-reply-to: <561B7AFF.1080707@samsung.com> Content-type: text/plain; charset=windows-1252; format=flowed Content-transfer-encoding: 7bit X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrDIsWRmVeSWpSXmKPExsWyRsSkVjdsmXSYwcRmNov5R86xWpxddpDN 4vULQ4v+x6+ZLTY9vsZqcXnXHDaLGef3MVkcftPOarFg4yNGB06P2Q0XWTw2repk89i8pN6j b8sqRo/Pm+QCWKO4bFJSczLLUov07RK4MvbuaGYu+MhdcWz6UsYGxg+cXYycHBICJhJH175g g7DFJC7cWw9kc3EICaxglPj6cC4bTNGBqTugErMYJS5tO8gIkhASeMAo0dJYAGLzCmhJTO1b ABZnEVCVeHRhDQuIzSagLXF3+hamLkYODlGBCInHF4QgygUlfky+B1YiIpAg0TJzJTvIfGaB U4wSbY//gCWEBdwlTt+cxQ6xuJ1RonFqAzNIghNoaPupTUwgNrOArcSC9+tYIGx5ic1r3jKD NEgIPGKX+HD4ESvERQIS3yYfYgG5QkJAVmLTAWaIzyQlDq64wTKBUWwWkqNmIRk7C8nYBYzM qxhFUwuSC4qT0otM9IoTc4tL89L1kvNzNzECI/H0v2cTdjDeO2B9iFGAg1GJh5dji1SYEGti WXFl7iFGU6ArJjJLiSbnA+M9ryTe0NjMyMLUxNTYyNzSTEmc97XUz2AhgfTEktTs1NSC1KL4 otKc1OJDjEwcnFINjIpTV4b+kJx3b/GPOobnl45L7WxvW2jPwfxRIWTPhKa53yZn5ESHWagX ruqanqladszi7LHlD0IZ+tzOm0eaH3lfcIqFVe+Pu6pB6/QkD0UWm+KogKAT/K1HuP+KZj7h 5+rZabJ07t2S0uofyY85HWzN5NNe8HtMc7Tay7v//izj6CO8S54dUmIpzkg01GIuKk4EAL9x MIG/AgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrJIsWRmVeSWpSXmKPExsVy+t9jQd3QZdJhBhd2WVvMP3KO1eLssoNs Fq9fGFr0P37NbLHp8TVWi8u75rBZzDi/j8ni8Jt2VosFGx8xOnB6zG64yOKxaVUnm8fmJfUe fVtWMXp83iQXwBrVwGiTkZqYklqkkJqXnJ+SmZduq+QdHO8cb2pmYKhraGlhrqSQl5ibaqvk 4hOg65aZA3SPkkJZYk4pUCggsbhYSd8O04TQEDddC5jGCF3fkCC4HiMDNJCwhjFj745m5oKP 3BXHpi9lbGD8wNnFyMkhIWAicWDqDjYIW0ziwr31QDYXh5DALEaJS9sOMoIkhAQeMEq0NBaA 2LwCWhJT+xaAxVkEVCUeXVjDAmKzCWhL3J2+hamLkYNDVCBC4vEFIYhyQYkfk++BlYgIJEi0 zFzJDjKfWeAUo0Tb4z9gCWEBd4nTN2exQyxuZ5RonNrADJLgBBrafmoTE4jNLGArseD9OhYI W15i85q3zBMYgc5EWDILSdksJGULGJlXMUqkFiQXFCel5xrmpZbrFSfmFpfmpesl5+duYgRH +zOpHYwHd7kfYhTgYFTi4eXYIhUmxJpYVlyZe4hRgoNZSYRXaaJ0mBBvSmJlVWpRfnxRaU5q 8SFGU2AoTGSWEk3OByaivJJ4Q2MTc1NjU0sTCxMzSyVx3huHGMKEBNITS1KzU1MLUotg+pg4 OKUaGLf+lBEo4+3+o3hg7jZ981k/Wb3czS8oua+PncfAZmz7ctJswd7mWaIcU+xmqd0TvHq9 O2qK/sVp024mnTI1Oi1dcVw53e3hgeRXIgmznTaKHeBVtP7676/YXoszAnmRUz4d4Jix8Mxr D39xC/6pP5eEVj/3u6Jl8NzArPZX6IeMa+sf7GSMuajEUpyRaKjFXFScCADi6LXODAMAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Sylwester, On 10/12/2015 02:48 PM, Sylwester Nawrocki wrote: > On 12/10/15 08:47, Krzysztof Kozlowski wrote: >>> diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts >>>> index 8f4d76c..525a93a 100644 >>>> --- a/arch/arm/boot/dts/exynos5420-peach-pit.dts >>>> +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts >>>> @@ -1056,5 +1056,10 @@ >>>> timeout-sec = <32>; >>>> }; >>>> >>>> +&pmu_system_controller { >> >> Please put the node in alphabetical order. >> >>>> + assigned-clocks = <&pmu_system_controller 0>; >>>> + assigned-clock-parents = <&clock CLK_FIN_PLL>; >> >> I might be missing something here but isn't the first clock of >> pmu_system_controller already a CLK_FIN_PLL? So you are reparenting the >> FIN_PLL to FIN_PLL? > > No, it's not, the first PMU consumer clock is indeed CLK_FIN_PLL, > but pmu_system_controller is also a clock provider. The first output > clock of pmu_system_controller is CLKOUT, it's a composite mux and > gate clock (registered in drivers/clk/samsung /clk-exynos-clkout.c). > So the above dts change is selecting an external oscillator input of > the CLKOUT mux, i.e. it will route 24 MHz clock signal from the external > oscillator to the CLKOUT output pin, to which audio CODEC is connected > on peach-pit AFAICS. > Thanks for your explanation, indeed master clock of codec is connected to XCLKOUT on peach boards. Will send v2 addressing Kezysztof's other comments. Regards, Alim