From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752431AbbJLNEj (ORCPT ); Mon, 12 Oct 2015 09:04:39 -0400 Received: from mailout1.samsung.com ([203.254.224.24]:45393 "EHLO mailout1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751426AbbJLNEh (ORCPT ); Mon, 12 Oct 2015 09:04:37 -0400 X-AuditID: cbfee691-f79d66d000001509-24-561bafdf1c1b Message-id: <561BAFDF.2090501@samsung.com> Date: Mon, 12 Oct 2015 22:04:31 +0900 From: Jaehoon Chung User-Agent: Mozilla/5.0 (X11; Linux i686; rv:31.0) Gecko/20100101 Thunderbird/31.6.0 MIME-version: 1.0 To: Krzysztof Kozlowski , Anand Moon Cc: k.kozlowski.k@gmail.com, Kukjin Kim , Javier Martinez Canillas , Lukasz Majewski , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, "linux-samsung-soc@vger.kernel.org" , Linux Kernel Subject: Re: [PATCH 3/3] ARM: dts: exynos5422-odroidxu3: Added UHS-I bus speed support References: <1444578364-1384-1-git-send-email-linux.amoon@gmail.com> <1444578364-1384-3-git-send-email-linux.amoon@gmail.com> <561B48B7.1040201@samsung.com> <561BAAB1.4020203@samsung.com> In-reply-to: <561BAAB1.4020203@samsung.com> Content-type: text/plain; charset=utf-8 Content-transfer-encoding: 7bit X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrCIsWRmVeSWpSXmKPExsWyRsSkWPf+eukwgzU9vBbzj5xjtXjzdg2T xfN/P9gtXr8wtOh//JrZ4s3DzYwWmx5fY7W4vGsOm8WM8/uYLNZtvMXuwOWxc9Zddo9NqzrZ PDYvqffY0g/k9W1ZxejxeZNcAFsUl01Kak5mWWqRvl0CV8bSSQvYC36oVnQ8WcDYwDhFrouR k0NCwERi+oc1jBC2mMSFe+vZuhi5OIQEVjBK9H95ywhT9HLDIajELEaJ5U+6mCGcB4wSjzb8 Zwep4hXQkmh5M5upi5GDg0VAVeL8yiSQMJuAjsT2b8eZQGxRgTCJB+v2skKUC0r8mHyPBcQW EQiX+DDpKivITGaBm0wSz3qfs4LMERaIkDhx1QhiVweTxPrbb8Au4hTQlmh61swCUsMsoC4x ZUouSJhZQF5i85q3YLdJCHxll9hxYBbYYhYBAYlvkw+B1UsIyEpsOsAM8ZikxMEVN1gmMIrN QnLSLISps5BMXcDIvIpRNLUguaA4Kb3IVK84Mbe4NC9dLzk/dxMjMDJP/3s2cQfj/QPWhxgF OBiVeHg5tkiFCbEmlhVX5h5iNAU6YiKzlGhyPjD+80riDY3NjCxMTUyNjcwtzZTEeXWkfwYL CaQnlqRmp6YWpBbFF5XmpBYfYmTi4JRqYGwRrm26/vvbfNkI47BJl/jndysdnNOtJqf90lH6 0KwQEzPHp6bLig2D58578HLradvjJpzno+0ObrHR2dE710D8xsRVFvobrjbe8GTmWT7p7G47 vV7rOfkVmnUbmGotjpzavz7Bca7WioLM+qYP7PvWfdXZUzW7YpL1aYGfm9+wF/ssuvs965kS S3FGoqEWc1FxIgBkNQtbxwIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpkleLIzCtJLcpLzFFi42I5/e+xoO799dJhBrO+sVnMP3KO1eLN2zVM Fs///WC3eP3C0KL/8WtmizcPNzNabHp8jdXi8q45bBYzzu9jsli38Ra7A5fHzll32T02repk 89i8pN5jSz+Q17dlFaPH501yAWxRDYw2GamJKalFCql5yfkpmXnptkrewfHO8aZmBoa6hpYW 5koKeYm5qbZKLj4Bum6ZOUCXKSmUJeaUAoUCEouLlfTtME0IDXHTtYBpjND1DQmC6zEyQAMJ axgzlk5awF7wQ7Wi48kCxgbGKXJdjJwcEgImEi83HGKDsMUkLtxbD2RzcQgJzGKUWP6kixnC ecAo8WjDf3aQKl4BLYmWN7OZuhg5OFgEVCXOr0wCCbMJ6Ehs/3acCcQWFQiTeLBuLytEuaDE j8n3WEBsEYFwiQ+TrrKCzGQWuMkk8az3OSvIHGGBCIkTV40gdnUwSay//YYRpIFTQFui6Vkz C0gNs4C6xJQpuSBhZgF5ic1r3jJPYAS6EmHFLISqWUiqFjAyr2KUSC1ILihOSs81ykst1ytO zC0uzUvXS87P3cQIjv5n0jsYD+9yP8QowMGoxMPLsUUqTIg1say4MvcQowQHs5IIr9JE6TAh 3pTEyqrUovz4otKc1OJDjKbAIJjILCWanA9MTHkl8YbGJmZGlkbmhhZGxuZK4rw3DjGECQmk J5akZqemFqQWwfQxcXBKNTAuXPnnK/fjyOTV3QpXVs9Ky2VQzU9cUFPdyLv08ct5V79P15+w SHxNzs1Xs1fN8ihZtYInYNMGrjmundNWrzUPffL6z+ydZRPWLDdq4u8XMMzx2r1kuvHEpuNV K0Ul+VtZK/yyGpgz637k8c++EXP8+50Ps4zrvrllZD9z+3+3/PX5Aw8LfqnUK7EUZyQaajEX FScCAAo6aIMUAwAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 10/12/2015 09:42 PM, Krzysztof Kozlowski wrote: > W dniu 12.10.2015 o 19:46, Anand Moon pisze: >> Hi Krzysztof, >> >> On 12 October 2015 at 11:14, Krzysztof Kozlowski >> wrote: >>> On 12.10.2015 00:46, Anand Moon wrote: >>>> Added support for UHS-I bus speed 50MB/s (SDR50, DDR50) 104MB/s (SDR104) >>> >>> This description is not entirely correct. The MMC driver already >>> supports these UHS speeds (you did not any code) so you rather enabled >>> it (description of bindings says "is supported"). >>> >>> You mentioned DDR50 but I don't see respective property below. >> Looks like I missed it, I will add this in the next patch, >>> >>> How do you know that these modes are really supported? I don't know. Can >>> you convince me? > > That part was not answered... In my experiment, it needs two requirements. One is that Host controller supported UHS-I mode or others, other is SD-card. In Anand's commit message, there is no information for this. And 50MB/s or 104MB/s is not real performance. (Just theoretical values) It seems that can get those performances. > >>> >> >>>> >>>> Signed-off-by: Anand Moon >>>> >>>> --- >>>> Changes based on git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git v4.4-next/dt-samsung branch >>>> >>>> Changes Fixed the UHS-I bus speed detedtion on cold boot. >>> >>> I don't get what is exactly fixed here. What was the error? What is the >>> outcome of this fix? The log below is before or after? >>> >>> Best regards, >>> Krzysztof >>> >>>> >>>> [ 2.439806] mmc_host mmc1: Bus speed (slot 0) = 100000000Hz (slot req 100000000Hz, actual 100000000HZ div = 0) >>>> [ 2.449729] mmc1: new ultra high speed SDR50 SDHC card at address aaaa >>>> [ 2.455984] mmcblk0: mmc1:aaaa SL32G 29.7 GiB >>>> [ 2.461743] mmcblk0: p1 p2 >>> >>>> --- >>>> arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 4 ++++ >>>> 1 file changed, 4 insertions(+) >>>> >>>> diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi >>>> index 58c06d3..ba4a87b 100644 >>>> --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi >>>> +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi >>>> @@ -364,6 +364,10 @@ >>>> pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; >>>> bus-width = <4>; >>>> cap-sd-highspeed; >>>> + sd-uhs-sdr12; >>>> + sd-uhs-sdr25; >>>> + sd-uhs-sdr50; >>>> + sd-uhs-sdr104; >>>> }; >>>> >>>> &pinctrl_0 { >>>> >>> >> >> Changes were made to support Sandisk Ultra UHS-I class 10 card support. >> OdroidXU3/XU4 board would not boot up using this card. >> >> Depending on the capability of the UHS-I card, the speed of the card >> is selected. >> I have just added the enhance capability feature to support them. > > So without these capabilities mentioned microSD card cannot be used? So > I have a UHS-I card, that one exactly: > http://www.samsung.com/us/support/owners/product/MB-MP32D/APC > > It works: > [ 2.628365] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req > 50000000Hz, actual 50000000HZ div = 0) > [ 2.693296] mmc1: new high speed SDHC card at address 0001 > [ 2.703867] mmcblk0: mmc1:0001 00000 29.8 GiB > [ 2.708406] mmcblk0: p1 p2 > > This is just HS mode. > > In the same time isn't UHS-I backward compatible? Your report seems > surprising. Right. it's not issue. just working as lower mode than its capability. Best Regards, Jaehoon Chung > > Best regards, > Krzysztof > >> >> On warm boot: i.e reboot of the board. >> [ 4.649073] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot >> req 50000000Hz, actual 50000000HZ div = 0) >> [ 4.657555] mmc1: new high speed SDHC card at address aaaa >> [ 4.663787] mmcblk0: mmc1:aaaa SL32G 29.7 GiB >> [ 4.669206] mmcblk0: p1 p2 >> >> On cold boot:: ie: power on the board. >> >> [ 4.630237] mmc_host mmc1: Bus speed (slot 0) = 100000000Hz (slot >> req 100000000Hz, actual 100000000HZ div = 0) >> [ 4.639820] mmc1: new ultra high speed SDR50 SDHC card at address aaaa >> [ 4.646266] mmcblk0: mmc1:aaaa SL32G 29.7 GiB >> [ 4.650293] IRQ56 no longer affine to CPU7 >> [ 4.650581] CPU7: shutdown >> [ 4.658293] mmcblk0: p1 p2 >> >> Note: Their is need to reset the PMIC >> S2MPS11_REG_L13CTRL/S2MPS11_REG_L19CTRL registers >> to support this feature consistently on every reboot. >> >> -Anand Moon >> -- >> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in >> the body of a message to majordomo@vger.kernel.org >> More majordomo info at http://vger.kernel.org/majordomo-info.html >> Please read the FAQ at http://www.tux.org/lkml/ >> > >