From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
	id S1752715AbbJLW3h (ORCPT <rfc822;w@1wt.eu>);
	Mon, 12 Oct 2015 18:29:37 -0400
Received: from bear.ext.ti.com ([192.94.94.41]:40487 "EHLO bear.ext.ti.com"
	rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP
	id S1751601AbbJLW3f (ORCPT <rfc822;linux-kernel@vger.kernel.org>);
	Mon, 12 Oct 2015 18:29:35 -0400
Subject: Re: [PATCH v6 11/17] Documentation: phy: add document for rockchip dp
 phy
To: Yakir Yang <ykk@rock-chips.com>, Inki Dae <inki.dae@samsung.com>,
        Andrzej Hajda <a.hajda@samsung.com>,
        Joonyoung Shim <jy0922.shim@samsung.com>,
        Seung-Woo Kim <sw0312.kim@samsung.com>,
        Kyungmin Park <kyungmin.park@samsung.com>,
        Jingoo Han <jingoohan1@gmail.com>, Thierry Reding <treding@nvidia.com>,
        Krzysztof Kozlowski <k.kozlowski@samsung.com>,
        Rob Herring <robh+dt@kernel.org>, <joe@perches.com>,
        Heiko Stuebner <heiko@sntech.de>, Mark Yao <mark.yao@rock-chips.com>
References: <1444491357-26095-1-git-send-email-ykk@rock-chips.com>
 <1444492695-27241-1-git-send-email-ykk@rock-chips.com>
CC: Russell King <linux@arm.linux.org.uk>, <djkurtz@chromium.org>,
        <dianders@chromium.org>, Sean Paul <seanpaul@chromium.org>,
        Kukjin Kim <kgene@kernel.org>, Kumar Gala <galak@codeaurora.org>,
        <emil.l.velikov@gmail.com>,
        Ian Campbell <ijc+devicetree@hellion.org.uk>,
        Gustavo Padovan <gustavo.padovan@collabora.co.uk>,
        Pawel Moll <pawel.moll@arm.com>, <ajaynumb@gmail.com>,
        <robherring2@gmail.com>, <javier@osg.samsung.com>,
        Andy Yan <andy.yan@rock-chips.com>, <dri-devel@lists.freedesktop.org>,
        <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        <linux-samsung-soc@vger.kernel.org>,
        <linux-rockchip@lists.infradead.org>,
        <linux-arm-kernel@lists.infradead.org>
From: Kishon Vijay Abraham I <kishon@ti.com>
Message-ID: <561C3410.8090600@ti.com>
Date: Tue, 13 Oct 2015 03:58:32 +0530
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101
 Thunderbird/38.2.0
MIME-Version: 1.0
In-Reply-To: <1444492695-27241-1-git-send-email-ykk@rock-chips.com>
Content-Type: text/plain; charset="windows-1252"
Content-Transfer-Encoding: 7bit
Sender: linux-kernel-owner@vger.kernel.org
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

Hi,

On Saturday 10 October 2015 09:28 PM, Yakir Yang wrote:
> This phy driver is binded with the Rockchip DisplayPort
> driver, here are the brief properties:
> 	edp_phy: edp-phy@ff770274 {
> 		compatible = "rockchip,rk3288-dp-phy";
> 		rockchip,grf = <&grf>;
> 		clocks = <&cru SCLK_EDP_24M>;
> 		clock-names = "24m";
> 		#phy-cells = <0>;
> 	};

The commit message can simply be "Add dt binding documentation for
rockchip display port PHY".

Thanks
Kishon

> 
> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
> ---
> Changes in v6: None
> Changes in v5:
> - Split binding doc's from driver changes. (Rob)
> - Update the rockchip,grf explain in document, and correct the clock required
>   elemets in document. (Rob & Heiko)
> 
> Changes in v4: None
> Changes in v3: None
> Changes in v2: None
> 
>  .../devicetree/bindings/phy/rockchip-dp-phy.txt    | 22 ++++++++++++++++++++++
>  1 file changed, 22 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt
> 
> diff --git a/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt
> new file mode 100644
> index 0000000..505194e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt
> @@ -0,0 +1,22 @@
> +Rockchip Soc Seroes Display Port PHY
> +------------------------------------
> +
> +Required properties:
> +- compatible : should be one of the following supported values:
> +	 - "rockchip.rk3288-dp-phy"
> +- clocks: from common clock binding: handle to dp clock.
> +	of memory mapped region.
> +- clock-names: from common clock binding:
> +	Required elements: "24m"
> +- rockchip,grf: phandle to the syscon managing the "general register files"
> +- #phy-cells : from the generic PHY bindings, must be 0;
> +
> +Example:
> +
> +edp_phy: edp-phy@ff770274 {
> +	compatible = "rockchip,rk3288-dp-phy";
> +	rockchip,grf = <&grf>;
> +	clocks = <&cru SCLK_EDP_24M>;
> +	clock-names = "24m";
> +	#phy-cells = <0>;
> +};
>