From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932263AbbJMDoH (ORCPT ); Mon, 12 Oct 2015 23:44:07 -0400 Received: from mailout2.w1.samsung.com ([210.118.77.12]:31217 "EHLO mailout2.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752009AbbJMDoE (ORCPT ); Mon, 12 Oct 2015 23:44:04 -0400 X-AuditID: cbfec7f4-f79c56d0000012ee-4c-561c7e009a60 Subject: Re: [PATCH 3/3] ARM: dts: exynos5422-odroidxu3: Added UHS-I bus speed support To: Anand Moon References: <1444578364-1384-1-git-send-email-linux.amoon@gmail.com> <1444578364-1384-3-git-send-email-linux.amoon@gmail.com> <561B48B7.1040201@samsung.com> <561C4CEE.3050905@samsung.com> Cc: Kukjin Kim , Javier Martinez Canillas , Lukasz Majewski , Jaehoon Chung , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, "linux-samsung-soc@vger.kernel.org" , Linux Kernel From: Krzysztof Kozlowski Message-id: <561C7DF1.6000609@samsung.com> Date: Tue, 13 Oct 2015 12:43:45 +0900 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.3.0 MIME-version: 1.0 In-reply-to: Content-type: text/plain; charset=utf-8 Content-transfer-encoding: 7bit X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrNLMWRmVeSWpSXmKPExsVy+t/xK7oMdTJhBreX8VrMP3KO1eLN2zVM Fjd+tbFavH5haNH/+DWzxZuHmxktNj2+xmpxedccNosZ5/cxWazbeIvdgctj56y77B6bVnWy eWxeUu+xpR/I69uyitHj8ya5ALYoLpuU1JzMstQifbsErozfqxaxFRwSq2iYtY2lgbFVqIuR k0NCwERi9dqLzBC2mMSFe+vZuhi5OIQEljJKLL6wA8r5wijxfstRoCoODmGBCIkTV41AGkQE 1CSuPF3BCmILCZxnkpj+1BrEZhZ4xSTx4I0biM0mYCyxefkSNhCbV0BLYsL/fUwgNouAqsSJ a+fAbFGgkRMnNLBC1AhK/Jh8jwXE5hQIlmh8MhVsLbOAusSUKbkQ4+UlNq95yzyBUWAWko5Z CFWzkFQtYGRexSiaWppcUJyUnmuoV5yYW1yal66XnJ+7iRESBV92MC4+ZnWIUYCDUYmH90Wk TJgQa2JZcWXuIUYJDmYlEd5zWUAh3pTEyqrUovz4otKc1OJDjNIcLErivHN3vQ8REkhPLEnN Tk0tSC2CyTJxcEo1ME6Us2hVqw17ds126WSfy7OMOtfXlLK7qm+YqKfjsvRH0owp8kVs2efa 7m39k/nNOie2kJvppu7bGQ7vvthN/Jv/fPnZ/zUTREUfOnW+Pv8mZt7Kme3GUpx/Kl50Hb8d 25YpX/egXtbjmNaVhp+9c6bOXG3D1l99XI7z5jXWnawT1RvSJh7XmqnEUpyRaKjFXFScCADm 3GjbfgIAAA== Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 13.10.2015 12:08, Anand Moon wrote: > Hi Krzysztof, > > On 13 October 2015 at 05:44, Krzysztof Kozlowski > wrote: >> On 13.10.2015 00:32, Anand Moon wrote: >>> Hi Krzysztof, >>> >>> On 12 October 2015 at 11:14, Krzysztof Kozlowski >>> wrote: >>>> On 12.10.2015 00:46, Anand Moon wrote: >>>>> Added support for UHS-I bus speed 50MB/s (SDR50, DDR50) 104MB/s (SDR104) >>>> >>>> This description is not entirely correct. The MMC driver already >>>> supports these UHS speeds (you did not any code) so you rather enabled >>>> it (description of bindings says "is supported"). >>>> >>>> You mentioned DDR50 but I don't see respective property below. >>>> >>>> How do you know that these modes are really supported? I don't know. Can >>>> you convince me? >>> >>> Setting this DDR50 capability give me this error. That's the reason to >>> drop this capability. >> >> But you mentioned it in commit message! "Added support for UHS-I ... >> (DDR50)" >> >> In the same time dropping DDR50 is not an sufficient proof that "SDR50 >> and SDR104 are really supported". >> > > These changes are related to the microSD card capabilities. > So SDR50 have better frequency over DDR50. On the same Sandisk card. > > When the card select the capability for DDR50 > --------------------------------------------------- > [ 4.001477] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot > req 50000000Hz, actual 50000000HZ div = 0) > [ 4.001604] mmc1: new ultra high speed DDR50 SDHC card at address aaaa > [ 4.004505] mmcblk0: mmc1:aaaa SL32G 29.7 GiB > [ 4.009179] mmcblk0: error -110 sending status command, retrying > [ 4.009271] mmcblk0: error -115 sending stop command, original cmd > response 0x900, card status 0x900 > [ 4.009275] mmcblk0: error -84 transferring data, sector 0, nr 8, > cmd response 0x900, card status 0x0 > [ 4.025563] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot > req 400000Hz, actual 396825HZ div = 63) > [ 4.067770] Console: switching to colour frame buffer device 274x77 > [ 4.098782] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot > req 50000000Hz, actual 50000000HZ div = 0) > [ 4.099692] mmc1: tried to reset card > [ 4.101332] mmcblk0: p1 p2 > > > When the card select the capability for SDR50 > --------------------------------------------------------------------------------- > [ 2.439806] mmc_host mmc1: Bus speed (slot 0) = 100000000Hz (slot req > 100000000Hz, actual 100000000HZ div = 0) > [ 2.449729] mmc1: new ultra high speed SDR50 SDHC card at address aaaa > [ 2.455984] mmcblk0: mmc1:aaaa SL32G 29.7 GiB > [ 2.461743] mmcblk0: p1 p2 > > Which will relate to better read/write speed. Which is not an answer to my question. To none of my previous questions. Best regards, Krzysztof