From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753193AbbJNJok (ORCPT ); Wed, 14 Oct 2015 05:44:40 -0400 Received: from szxga01-in.huawei.com ([58.251.152.64]:35897 "EHLO szxga01-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752856AbbJNJoh (ORCPT ); Wed, 14 Oct 2015 05:44:37 -0400 Message-ID: <561E23EB.7050504@hisilicon.com> Date: Wed, 14 Oct 2015 17:44:11 +0800 From: Zhou Wang User-Agent: Mozilla/5.0 (Windows NT 6.1; rv:17.0) Gecko/20130509 Thunderbird/17.0.6 MIME-Version: 1.0 To: Arnd Bergmann CC: Gabriele Paoloni , Bjorn Helgaas , Bjorn Helgaas , "jingoohan1@gmail.com" , "pratyush.anand@gmail.com" , "linux@arm.linux.org.uk" , "thomas.petazzoni@free-electrons.com" , "lorenzo.pieralisi@arm.com" , "james.morse@arm.com" , "Liviu.Dudau@arm.com" , "jason@lakedaemon.net" , "robh@kernel.org" , "gabriel.fernandez@linaro.org" , "Minghuan.Lian@freescale.com" , "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , zhangjukuo , qiuzhenfa , "liudongdong (C)" , qiujiang , "xuwei (O)" , "Liguozhu (Kenneth)" , "Wangkefeng (Kevin)" , Rob Herring Subject: Re: [PATCH v10 4/6] PCI: hisi: Add PCIe host support for HiSilicon SoC Hip05 References: <1444445957-239522-1-git-send-email-wangzhou1@hisilicon.com> <11677087.JbqAo0FWJE@wuerfel> <561E1957.5030503@hisilicon.com> <30775300.COZ4nEMWXC@wuerfel> In-Reply-To: <30775300.COZ4nEMWXC@wuerfel> Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.66.65.131] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2015/10/14 17:06, Arnd Bergmann wrote: > On Wednesday 14 October 2015 16:59:03 Zhou Wang wrote: >> >> Hi Arnd, >> >> In Hip05 PCIe host, it uses GITS_TRANSLATER's address to get TLP package >> which contains MSI address and MSI data, and then combine BDF and MSI data >> to a 32 bit data which will be writen to GITS_TRANSLATER register of ITS. >> >> I think maybe this is a defect of our PCIe controller. > > I'd consider it a bug in the firmware if this is not set up correctly > before boot. > >>> I don't think what you do here is safe because the 'reg' property >>> of the MSI controller might point to the address that is used for >>> the message directly. >> >> I see your point, however we must get address of GITS_TRANSLATER and >> set it to PCIe host. How about adding necessary comments here? > > This seems to just be static setup that should be done before Linux > is even loaded. Any reason you can't do it that way? > There are some ITSs in Hip05-D02 platform, in fact, we can use any of them as a msi-controller, which we can configure in dts. I am afraid that hard-setting the value in BIOS would lead to restrictions in terms of flexibility, as with the current implementation the same BIOS-driver can fit different DTS structures. Regards, Zhou > Arnd > > . >