From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754326AbbJNPxh (ORCPT ); Wed, 14 Oct 2015 11:53:37 -0400 Received: from eu-smtp-delivery-143.mimecast.com ([207.82.80.143]:46062 "EHLO eu-smtp-delivery-143.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754163AbbJNPxf convert rfc822-to-8bit (ORCPT ); Wed, 14 Oct 2015 11:53:35 -0400 Subject: Re: [PATCHv3 10/11] arm64: Add 16K page size support To: Jeremy Linton , linux-arm-kernel@lists.infradead.org References: <1444821634-1689-1-git-send-email-suzuki.poulose@arm.com> <1444821634-1689-11-git-send-email-suzuki.poulose@arm.com> <561E7788.6080900@arm.com> Cc: linux-kernel@vger.kernel.org, catalin.marinas@arm.com, will.deacon@arm.com, mark.rutland@arm.com, steve.capper@linaro.org, marc.zyngier@arm.com, ard.biesheuvel@linaro.org, christoffer.dall@linaro.org From: "Suzuki K. Poulose" Message-ID: <561E7A7D.3020207@arm.com> Date: Wed, 14 Oct 2015 16:53:33 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.2.0 MIME-Version: 1.0 In-Reply-To: <561E7788.6080900@arm.com> X-OriginalArrivalTime: 14 Oct 2015 15:53:33.0347 (UTC) FILETIME=[7AADEF30:01D10698] X-MC-Unique: jSB-xSGJQaiEjn3Psfekng-1 Content-Type: text/plain; charset=WINDOWS-1252; format=flowed Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 14/10/15 16:40, Jeremy Linton wrote: > On 10/14/2015 06:20 AM, Suzuki K. Poulose wrote: >> diff --git a/arch/arm64/include/asm/page.h b/arch/arm64/include/asm/page.h >> index da32354..736ed4c 100644 >> --- a/arch/arm64/include/asm/page.h >> +++ b/arch/arm64/include/asm/page.h >> @@ -24,6 +24,9 @@ >> #ifdef CONFIG_ARM64_64K_PAGES >> #define PAGE_SHIFT 16 >> #define CONT_SHIFT 5 >> +#elif defined(CONFIG_ARM64_16K_PAGES) >> +#define PAGE_SHIFT 14 >> +#define CONT_SHIFT 9 >> #else >> #define PAGE_SHIFT 12 >> #define CONT_SHIFT 4 > > Suzuki, > > Is CONT_SHIFT correct? I thought it should be 7? The ARM-ARM says that a contiguous 3rd level lookup is 128 entries. > Err, you are right. I tested it with 9 and I still got contiguous mappings. May be because we anyway have 7 contiguous bits and the kernel text is read-only. I will fix that, thanks for spotting. Suzuki