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From: "Suzuki K. Poulose" <Suzuki.Poulose@arm.com>
To: Catalin Marinas <catalin.marinas@arm.com>
Cc: linux-arm-kernel@lists.infradead.org, mark.rutland@arm.com,
	Vladimir.Murzin@arm.com, steve.capper@linaro.org,
	ryan.arnold@linaro.org, ard.biesheuvel@linaro.org,
	marc.zyngier@arm.com, will.deacon@arm.com,
	linux-kernel@vger.kernel.org, edward.nevill@linaro.org,
	aph@redhat.com, james.morse@arm.com, andre.przywara@arm.com,
	dave.martin@arm.com, christoffer.dall@linaro.org
Subject: Re: [PATCH v3 09/24] arm64: Keep track of CPU feature registers
Date: Thu, 15 Oct 2015 11:45:27 +0100	[thread overview]
Message-ID: <561F83C7.9090500@arm.com> (raw)
In-Reply-To: <20151015103611.GK4239@e104818-lin.cambridge.arm.com>

On 15/10/15 11:36, Catalin Marinas wrote:
> Hi Suzuki,
>
> Some minor comments below.

>> The feature bits are classified as one of SCALAR_MIN, SCALAR_MAX and DISCRETE
>> depending on the implication of the possible values. This information
>> is used to decide the safe value for a feature.
>>
>
> The "SCALAR..." etc. in the comment needs updating.

Sorry about that. Will fix it.

>
>> +#define FTR_STRICT	true
>> +#define FTR_NONSTRICT	false
>
> Please add a comment on what STRICT/NONSTRICT mean.
>

Sure

>> +static inline u64 ftr_mask(struct arm64_ftr_bits *ftrp)
>> +{
>> +	return (u64)GENMASK(ftrp->shift + ftrp->width - 1, ftrp->shift);
>> +}
>> +
>> +static inline s64 arm64_ftr_value(struct arm64_ftr_bits *ftrp, u64 val)
>> +{
>> +	return cpuid_feature_extract_field_width(val, ftrp->shift, ftrp->width);
>> +}
>
> Slightly inconsistent naming: since you are prefixing everything with
> arm64_, do the same for ftr_mask.

OK, will add it.

>
>> +static struct arm64_ftr_reg arm64_ftr_regs[] = {
>> +
>> +	/* This array should be always kept in the ascending order of id  */
>
> Do we have a sanity check somewhere? You could also call sort() on this
> array and we wouldn't have to worry.

No we don't have a sanity check. I will take a look.

>
>> +/*
>> + * get_arm64_sys_reg - Lookup a feature register entry using its
>> + * sys_reg() encoding. With the array arm64_ftr_regs sorted in the
>> + * ascending order, we use binary search to find a matching entry.
>> + *
>> + * returns - Upon success,  matching ftr_reg entry for id.
>> + *         - NULL on failure. It is upto the caller to decide
>> + *	     the impact of a failure.
>> + */
>> +static struct arm64_ftr_reg* get_arm64_sys_reg(u32 sys_id)
>
> Nitpick: the * near the function name.
>
> Also rename it to get_arm64_ftr_reg() to match the actual return type.
>

Sure, will fix all of these. Thanks for the detailed look




  reply	other threads:[~2015-10-15 10:45 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-13 17:22 [PATCH v3 00/24] arm64: Consolidate CPU feature handling Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 01/24] arm64: Make the CPU information more clear Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 02/24] arm64: Delay ELF HWCAP initialisation until all CPUs are up Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 03/24] arm64: Delay cpuinfo_store_boot_cpu Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 04/24] arm64: Move cpu feature detection code Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 05/24] arm64: Move mixed endian support detection Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 06/24] arm64: Move /proc/cpuinfo handling code Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 07/24] arm64: Define helper for sys_reg id manipulation Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 08/24] arm64: Handle width of a cpuid feature Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 09/24] arm64: Keep track of CPU feature registers Suzuki K. Poulose
2015-10-15 10:36   ` Catalin Marinas
2015-10-15 10:45     ` Suzuki K. Poulose [this message]
2015-10-13 17:22 ` [PATCH v3 10/24] arm64: Consolidate CPU Sanity check to CPU Feature infrastructure Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 11/24] arm64: Read system wide CPUID value Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 12/24] arm64: Cleanup mixed endian support detection Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 13/24] arm64: Populate cpuinfo after notify_cpu_starting Suzuki K. Poulose
2015-10-15 10:54   ` Catalin Marinas
2015-10-15 13:23     ` Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 14/24] arm64: Delay cpu feature capability checks Suzuki K. Poulose
2015-10-17 22:56   ` kbuild test robot
2015-10-19  9:41     ` Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 15/24] arm64: Make use of system wide " Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 16/24] arm64: Cleanup HWCAP handling Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 17/24] arm64: Move FP/ASIMD hwcap handling to common code Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 18/24] arm64/debug: Make use of the system wide safe value Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 19/24] arm64/kvm: Make use of the system wide safe values Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 20/24] arm64: Documentation - Expose CPU feature registers Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 21/24] arm64: Add helper to decode register from instruction Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 22/24] arm64: cpufeature: Track the user visible fields Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 23/24] arm64: Expose feature registers by emulating MRS Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 24/24] arm64: cpuinfo: Expose MIDR_EL1 and REVIDR_EL1 to sysfs Suzuki K. Poulose
2015-10-14  9:03   ` Suzuki K. Poulose
2015-10-16 15:13 ` [PATCH v3 00/24] arm64: Consolidate CPU feature handling Dave Martin
2015-10-16 15:32   ` Suzuki K. Poulose
2015-10-16 15:42     ` Dave Martin
2015-10-25  8:06 ` Siddhesh Poyarekar
2015-10-27 18:09   ` Suzuki K. Poulose
2015-10-28  8:53     ` Siddhesh Poyarekar

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