From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753124AbbJONsw (ORCPT ); Thu, 15 Oct 2015 09:48:52 -0400 Received: from eu-smtp-delivery-143.mimecast.com ([207.82.80.143]:42088 "EHLO eu-smtp-delivery-143.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751730AbbJONsu convert rfc822-to-8bit (ORCPT ); Thu, 15 Oct 2015 09:48:50 -0400 Subject: Re: [PATCHv3 03/11] arm64: Introduce helpers for page table levels To: Christoffer Dall References: <1444821634-1689-1-git-send-email-suzuki.poulose@arm.com> <1444821634-1689-4-git-send-email-suzuki.poulose@arm.com> <20151015113735.GB21930@cbox> <20151015124451.GI8825@leverpostej> <561FA6AE.6090707@arm.com> <20151015133001.GF21930@cbox> Cc: Mark Rutland , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, catalin.marinas@arm.com, will.deacon@arm.com, steve.capper@linaro.org, marc.zyngier@arm.com, ard.biesheuvel@linaro.org From: "Suzuki K. Poulose" Message-ID: <561FAEBF.2090508@arm.com> Date: Thu, 15 Oct 2015 14:48:47 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.2.0 MIME-Version: 1.0 In-Reply-To: <20151015133001.GF21930@cbox> X-OriginalArrivalTime: 15 Oct 2015 13:48:47.0368 (UTC) FILETIME=[3719F080:01D10750] X-MC-Unique: cHMT_BK6Q0-sB1kw5u6_jA-1 Content-Type: text/plain; charset=WINDOWS-1252; format=flowed Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 15/10/15 14:30, Christoffer Dall wrote: > On Thu, Oct 15, 2015 at 02:14:22PM +0100, Suzuki K. Poulose wrote: >> On 15/10/15 13:44, Mark Rutland wrote: >>> On Thu, Oct 15, 2015 at 01:37:35PM +0200, Christoffer Dall wrote: >>>> On Wed, Oct 14, 2015 at 12:20:26PM +0100, Suzuki K. Poulose wrote: >> * The maximum number of levels supported by the architecture is 4. Hence at starting >> * at level n, we hanve (4 - n) levels of translation. So, the total number of bits > > nit: s/hanve/have/ Fixed. > >> * mapped by an entry at level n is : >> * >> * ((4 - n) - 1) * (PAGE_SHIFT - 3) + PAGE_SHIFT >> * >> * Rearranging it a bit we get : >> * (4 - n) * (PAGE_SHIFT - 3) + 3 >> */ >> >> Or we could use the formula without rearranging. >> > Either way, even I get it now. > > Thanks for the explanation!! :). I was involved too much in these calculations that, the formula looked obvious to me, when I wrote it. But yes, I did realise that it is indeed complicated, once I really started looking at explaining why I wrote it so. Thanks for being patient :) and complaining peacefully ! Btw, I have a revised (hopefully better) version here : /* * Size mapped by an entry at level n ( 0 <= n <= 3) * We map (PAGE_SHIFT - 3) at all translation levels and PAGE_SHIFT bits * in the final page. The maximum number of translation levels supported by * the architecture is 4. Hence, starting at at level n, we have further * ((4 - n) - 1) levels of translation excluding the offset within the page. * So, the total number of bits mapped by an entry at level n is : * * ((4 - n) - 1) * (PAGE_SHIFT - 3) + PAGE_SHIFT * * Rearranging it a bit we get : * (4 - n) * (PAGE_SHIFT - 3) + 3 */ > > Assuming some version of this goes in: > > Acked-by: Christoffer Dall > Thanks. I lost two interview questions though ;) Suzuki