From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753378AbbJOXo7 (ORCPT ); Thu, 15 Oct 2015 19:44:59 -0400 Received: from mailout1.w1.samsung.com ([210.118.77.11]:10626 "EHLO mailout1.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752580AbbJOXo5 (ORCPT ); Thu, 15 Oct 2015 19:44:57 -0400 X-AuditID: cbfec7f4-f79c56d0000012ee-01-56203a76704a Subject: Re: [PATCH v2 2/2] ARM: dts: exynos5250: Add clocks to DISP1 domain To: Tomeu Vizoso , linux-kernel@vger.kernel.org References: <1444905084-22540-1-git-send-email-tomeu.vizoso@collabora.com> <1444905084-22540-3-git-send-email-tomeu.vizoso@collabora.com> Cc: Gustavo Padovan , Javier Martinez Canillas , Seung-Woo Kim , Kukjin Kim , Inki Dae , Kyungmin Park , Joonyoung Shim , Russell King , devicetree@vger.kernel.org, Kumar Gala , Ian Campbell , linux-samsung-soc@vger.kernel.org, Rob Herring , Pawel Moll , Mark Rutland , linux-arm-kernel@lists.infradead.org From: Krzysztof Kozlowski Message-id: <56203A74.7040305@samsung.com> Date: Fri, 16 Oct 2015 08:44:52 +0900 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.3.0 MIME-version: 1.0 In-reply-to: <1444905084-22540-3-git-send-email-tomeu.vizoso@collabora.com> Content-type: text/plain; charset=windows-1252 Content-transfer-encoding: 7bit X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrEIsWRmVeSWpSXmKPExsVy+t/xq7plVgphBtOWSVjMP3KO1aL/zUJW i0+rW9ktzr1ayWgx6f4EFos3b9cwWby4d5HF4vULQ4v+x6+ZLc42vWG32PT4GqvF5V1z2Cxm nN/HZHH7Mq/F0usXmSwmTF/LYtG69wi7xYzJL9ks+tZeYnMQ9lgzbw2jR0tzD5vH5b5eJo+/ z6+zeOy4u4TRY+XyL2wem1Z1snlsXlLvsaX/LrtH35ZVjB6fN8kFcEdx2aSk5mSWpRbp2yVw ZXw6XFOwj7Oi/+gs9gbGu+xdjJwcEgImEje+vGaFsMUkLtxbz9bFyMUhJLCUUWLtmdksEM4X Rolli3vZQKqEBXwkvj7/DNYtIuAt0bOmjxWiqJtRYsbFZrB2ZoF/LBJzTmwEm8smYCyxefkS sG5eAS2JW5tmM4LYLAKqEnsutTKD2KICERITJzSwQtQISvyYfI8FxOYE2nCz8R+QzQE0VE/i /kUtkDCzgLzE5jVvmScwCsxC0jELoWoWkqoFjMyrGEVTS5MLipPScw31ihNzi0vz0vWS83M3 MUJi8ssOxsXHrA4xCnAwKvHwnnggFybEmlhWXJl7iFGCg1lJhPcOm0KYEG9KYmVValF+fFFp TmrxIUZpDhYlcd65u96HCAmkJ5akZqemFqQWwWSZODilGhgnW0+wDdD8dqh+D2uD80F9H51V lpYR3PcE1q/7td5j/53Ob3+enyqpumdduD7gR2qK5VxnfqP4Nb6eO9gdL2peO/vktmfx14OK Wwplem29ahjPvombyn/0ZJOJN/+jLQ2ZfiesxZcVmUr5THGqiHfc+KPcQmFqgoXR4e8/Hux+ u7Xj0Yay5+JKLMUZiYZazEXFiQCi9yhlxQIAAA== Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 15.10.2015 19:31, Tomeu Vizoso wrote: > Adds to the node of the DISP1 power domain the two clocks that need to > be reparented while the domain is powered off: > CLK_MOUT_ACLK200_DISP1_SUB and CLK_MOUT_ACLK300_DISP1_SUB. > > Otherwise the state is unknown at power up and the mixer's clocks are > all messed up. > > Signed-off-by: Tomeu Vizoso > Link: http://lkml.kernel.org/g/561CDC33.7050103@collabora.com > --- > > > arch/arm/boot/dts/exynos5250.dtsi | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi > index b24610ea8c2a..88b9cf5f226f 100644 > --- a/arch/arm/boot/dts/exynos5250.dtsi > +++ b/arch/arm/boot/dts/exynos5250.dtsi > @@ -130,6 +130,10 @@ > compatible = "samsung,exynos4210-pd"; > reg = <0x100440A0 0x20>; > #power-domain-cells = <0>; > + clocks = <&clock CLK_FIN_PLL>, > + <&clock CLK_MOUT_ACLK200_DISP1_SUB>, > + <&clock CLK_MOUT_ACLK300_DISP1_SUB>; > + clock-names = "oscclk", "clk0", "clk1"; > }; > > clock: clock-controller@10010000 { > I reviewed it already. Any changes here since v1? Best regards, Krzysztof