From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932554AbbJPSu3 (ORCPT ); Fri, 16 Oct 2015 14:50:29 -0400 Received: from mail-lb0-f172.google.com ([209.85.217.172]:35170 "EHLO mail-lb0-f172.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932101AbbJPSuZ (ORCPT ); Fri, 16 Oct 2015 14:50:25 -0400 Subject: Re: [PATCH] net: hix5hd2_gmac: avoid integer overload warning To: Joe Perches , Arnd Bergmann References: <1444967657-107994-1-git-send-email-huangdaode@hisilicon.com> <4752736.dePgPCNd9q@wuerfel> <063D6719AE5E284EB5DD2968C1650D6D1CBB97A6@AcuExch.aculab.com> <9667302.4m5v3ViVSt@wuerfel> <1445018654.22921.41.camel@perches.com> Cc: David Laight , huangdaode , "davem@davemloft.net" , "liguozhu@hisilicon.com" , "Yisen.Zhuang@huawei.com" , "netdev@vger.kernel.org" , "linuxarm@huawei.com" , "salil.mehta@huawei.com" , "kenneth-lee-2012@foxmail.com" , "xuwei5@hisilicon.com" , "lisheng011@huawei.com" , "linux-kernel@vger.kernel.org" , "lipeng321@huawei.com" From: Sergei Shtylyov Organization: Cogent Embedded Message-ID: <562146ED.1030308@cogentembedded.com> Date: Fri, 16 Oct 2015 21:50:21 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.1.0 MIME-Version: 1.0 In-Reply-To: <1445018654.22921.41.camel@perches.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 10/16/2015 09:04 PM, Joe Perches wrote: >>>> BITS_RX_EN is an 'unsigned long' constant, so the ones complement of that >>>> has bits set that do not fit into a 32-bit variable on 64-bit architectures, >>>> which causes a harmless gcc warning: >>> ... >>>> static void hix5hd2_port_disable(struct hix5hd2_priv *priv) >>>> { >>>> - writel_relaxed(~(BITS_RX_EN | BITS_TX_EN), priv->base + PORT_EN); >>>> + writel_relaxed(~(u32)(BITS_RX_EN | BITS_TX_EN), priv->base + PORT_EN); >>>> writel_relaxed(0, priv->base + DESC_WR_RD_ENA); >>> >>> ISTM that just means that the constants shouldn't be 'long'. >> >> Right, but that would probably mean changing the BIT() macro or not using it >> here. In the past I've argued against using that macro, but I've given >> up that fight. > > Fight on... (Somebody must have gone to USC here) > > There might be value in a BIT_U32 macro. > Maybe BIT_U64 too. There's BIT_ULL() already. MBR, Sergei