* [RFC][PATCH 0/3]perf/powerpc:Add ability to sample intr machine state in powerpc
@ 2015-10-19 12:18 Anju T
2015-10-19 12:18 ` [PATCH 1/3] perf/powerpc:add ability to sample intr machine state in power Anju T
` (2 more replies)
0 siblings, 3 replies; 8+ messages in thread
From: Anju T @ 2015-10-19 12:18 UTC (permalink / raw)
To: linux-kernel
Cc: linuxppc-dev, sukadev, acme, mpe, dsahern, jolsa, maddy, khandual,
hemant, Anju T
From: Anju T <anju@linux.vnet.ibm.com>
This short patch series add the ability to sample the interrupted
machine state for each hardware sample
Anju (3):
perf/powerpc:add ability to sample intr machine state in power
tools/perf:Map the ID values with register names
perf/powerpc:add support for sampling intr machine state
arch/powerpc/Kconfig | 1 +
arch/powerpc/include/uapi/asm/perf_regs.h | 55 +++++++++++++
arch/powerpc/perf/Makefile | 2 +-
arch/powerpc/perf/perf_regs.c | 85 ++++++++++++++++++++
tools/perf/arch/powerpc/include/perf_regs.h | 117 ++++++++++++++++++++++++++++
tools/perf/config/Makefile | 4 +
6 files changed, 263 insertions(+), 1 deletion(-)
create mode 100644 arch/powerpc/include/uapi/asm/perf_regs.h
create mode 100644 arch/powerpc/perf/perf_regs.c
create mode 100644 tools/perf/arch/powerpc/include/perf_regs.h
--
2.1.0
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/3] perf/powerpc:add ability to sample intr machine state in power
2015-10-19 12:18 [RFC][PATCH 0/3]perf/powerpc:Add ability to sample intr machine state in powerpc Anju T
@ 2015-10-19 12:18 ` Anju T
2015-10-20 4:16 ` Madhavan Srinivasan
2015-10-19 12:18 ` [RFC][PATCH 2/3] tools/perf:Map the ID values with register names Anju T
2015-10-19 12:18 ` [RFC][PATCH 3/3]perf/powerpc :add support for sampling intr machine state Anju T
2 siblings, 1 reply; 8+ messages in thread
From: Anju T @ 2015-10-19 12:18 UTC (permalink / raw)
To: linux-kernel
Cc: linuxppc-dev, sukadev, acme, mpe, dsahern, jolsa, maddy, khandual,
hemant, Anju
From: Anju <anju@linux.vnet.ibm.com>
The enum definition assigns an 'id' to each register in power.
The order of these values in the enum definition are based on
the corresponding macros in arch/powerpc/include/uapi/asm/ptrace.h .
Signed-off-by: Anju T <anju@linux.vnet.ibm.com>
---
arch/powerpc/include/uapi/asm/perf_regs.h | 55 +++++++++++++++++++++++++++++++
1 file changed, 55 insertions(+)
create mode 100644 arch/powerpc/include/uapi/asm/perf_regs.h
diff --git a/arch/powerpc/include/uapi/asm/perf_regs.h b/arch/powerpc/include/uapi/asm/perf_regs.h
new file mode 100644
index 0000000..b97727c
--- /dev/null
+++ b/arch/powerpc/include/uapi/asm/perf_regs.h
@@ -0,0 +1,55 @@
+#ifndef _ASM_POWERPC_PERF_REGS_H
+#define _ASM_POWERPC_PERF_REGS_H
+
+enum perf_event_powerpc_regs {
+ PERF_REG_POWERPC_GPR0,
+ PERF_REG_POWERPC_GPR1,
+ PERF_REG_POWERPC_GPR2,
+ PERF_REG_POWERPC_GPR3,
+ PERF_REG_POWERPC_GPR4,
+ PERF_REG_POWERPC_GPR5,
+ PERF_REG_POWERPC_GPR6,
+ PERF_REG_POWERPC_GPR7,
+ PERF_REG_POWERPC_GPR8,
+ PERF_REG_POWERPC_GPR9,
+ PERF_REG_POWERPC_GPR10,
+ PERF_REG_POWERPC_GPR11,
+ PERF_REG_POWERPC_GPR12,
+ PERF_REG_POWERPC_GPR13,
+ PERF_REG_POWERPC_GPR14,
+ PERF_REG_POWERPC_GPR15,
+ PERF_REG_POWERPC_GPR16,
+ PERF_REG_POWERPC_GPR17,
+ PERF_REG_POWERPC_GPR18,
+ PERF_REG_POWERPC_GPR19,
+ PERF_REG_POWERPC_GPR20,
+ PERF_REG_POWERPC_GPR21,
+ PERF_REG_POWERPC_GPR22,
+ PERF_REG_POWERPC_GPR23,
+ PERF_REG_POWERPC_GPR24,
+ PERF_REG_POWERPC_GPR25,
+ PERF_REG_POWERPC_GPR26,
+ PERF_REG_POWERPC_GPR27,
+ PERF_REG_POWERPC_GPR28,
+ PERF_REG_POWERPC_GPR29,
+ PERF_REG_POWERPC_GPR30,
+ PERF_REG_POWERPC_GPR31,
+ PERF_REG_POWERPC_NIP,
+ PERF_REG_POWERPC_MSR,
+ PERF_REG_POWERPC_ORIG_R3,
+ PERF_REG_POWERPC_CTR,
+ PERF_REG_POWERPC_LNK,
+ PERF_REG_POWERPC_XER,
+ PERF_REG_POWERPC_CCR,
+#ifdef __powerpc64__
+ PERF_REG_POWERPC_SOFTE,
+#else
+ PERF_REG_POWERPC_MQ,
+#endif
+ PERF_REG_POWERPC_TRAP,
+ PERF_REG_POWERPC_DAR,
+ PERF_REG_POWERPC_DSISR,
+ PERF_REG_POWERPC_RESULT,
+ PERF_REG_POWERPC_MAX,
+};
+#endif /* _ASM_POWERPC_PERF_REGS_H */
--
2.1.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [RFC][PATCH 2/3] tools/perf:Map the ID values with register names
2015-10-19 12:18 [RFC][PATCH 0/3]perf/powerpc:Add ability to sample intr machine state in powerpc Anju T
2015-10-19 12:18 ` [PATCH 1/3] perf/powerpc:add ability to sample intr machine state in power Anju T
@ 2015-10-19 12:18 ` Anju T
2015-10-19 12:18 ` [RFC][PATCH 3/3]perf/powerpc :add support for sampling intr machine state Anju T
2 siblings, 0 replies; 8+ messages in thread
From: Anju T @ 2015-10-19 12:18 UTC (permalink / raw)
To: linux-kernel
Cc: linuxppc-dev, sukadev, acme, mpe, dsahern, jolsa, maddy, khandual,
hemant, Anju
From: Anju <anju@linux.vnet.ibm.com>
The id values are mapped with the corresponding register names.
This names are displayed while using a perf report/perf script command.
Signed-off-by: Anju T <anju@linux.vnet.ibm.com>
---
tools/perf/arch/powerpc/include/perf_regs.h | 117 ++++++++++++++++++++++++++++
1 file changed, 117 insertions(+)
create mode 100644 tools/perf/arch/powerpc/include/perf_regs.h
diff --git a/tools/perf/arch/powerpc/include/perf_regs.h b/tools/perf/arch/powerpc/include/perf_regs.h
new file mode 100644
index 0000000..b27fc5a
--- /dev/null
+++ b/tools/perf/arch/powerpc/include/perf_regs.h
@@ -0,0 +1,117 @@
+#ifndef ARCH_PERF_REGS_H
+#define ARCH_PERF_REGS_H
+
+#include <stdlib.h>
+#include <linux/types.h>
+#include <asm/perf_regs.h>
+
+void perf_regs_load(u64 *regs);
+
+#define PERF_REGS_MASK ((1ULL << PERF_REG_POWERPC_MAX) - 1)
+#define PERF_REGS_MAX PERF_REG_POWERPC_MAX
+#define PERF_SAMPLE_REGS_ABI PERF_SAMPLE_REGS_ABI_64
+
+#define PERF_REG_IP PERF_REG_POWERPC_NIP
+#define PERF_REG_SP PERF_REG_POWERPC_R1
+
+static inline const char *perf_reg_name(int id){
+ switch (id) {
+ case PERF_REG_POWERPC_GPR0:
+ return "gpr0";
+ case PERF_REG_POWERPC_GPR1:
+ return "gpr1";
+ case PERF_REG_POWERPC_GPR2:
+ return "gpr2";
+ case PERF_REG_POWERPC_GPR3:
+ return "gpr3";
+ case PERF_REG_POWERPC_GPR4:
+ return "gpr4";
+ case PERF_REG_POWERPC_GPR5:
+ return "gpr5";
+ case PERF_REG_POWERPC_GPR6:
+ return "gpr6";
+ case PERF_REG_POWERPC_GPR7:
+ return "gpr7";
+ case PERF_REG_POWERPC_GPR8:
+ return "gpr8";
+ case PERF_REG_POWERPC_GPR9:
+ return "gpr9";
+ case PERF_REG_POWERPC_GPR10:
+ return "gpr10";
+ case PERF_REG_POWERPC_GPR11:
+ return "gpr11";
+ case PERF_REG_POWERPC_GPR12:
+ return "gpr12";
+ case PERF_REG_POWERPC_GPR13:
+ return "gpr13";
+ case PERF_REG_POWERPC_GPR14:
+ return "gpr14";
+ case PERF_REG_POWERPC_GPR15:
+ return "gpr15";
+ case PERF_REG_POWERPC_GPR16:
+ return "gpr16";
+ case PERF_REG_POWERPC_GPR17:
+ return "gpr17";
+ case PERF_REG_POWERPC_GPR18:
+ return "gpr18";
+ case PERF_REG_POWERPC_GPR19:
+ return "gpr19";
+ case PERF_REG_POWERPC_GPR20:
+ return "gpr20";
+ case PERF_REG_POWERPC_GPR21:
+ return "gpr21";
+ case PERF_REG_POWERPC_GPR22:
+ return "gpr22";
+ case PERF_REG_POWERPC_GPR23:
+ return "gpr23";
+ case PERF_REG_POWERPC_GPR24:
+ return "gpr24";
+ case PERF_REG_POWERPC_GPR25:
+ return "gpr25";
+ case PERF_REG_POWERPC_GPR26:
+ return "gpr26";
+ case PERF_REG_POWERPC_GPR27:
+ return "gpr27";
+ case PERF_REG_POWERPC_GPR28:
+ return "gpr28";
+ case PERF_REG_POWERPC_GPR29:
+ return "gpr29";
+ case PERF_REG_POWERPC_GPR30:
+ return "gpr30";
+ case PERF_REG_POWERPC_GPR31:
+ return "gpr31";
+ case PERF_REG_POWERPC_NIP:
+ return "nip";
+ case PERF_REG_POWERPC_MSR:
+ return "msr";
+ case PERF_REG_POWERPC_ORIG_R3:
+ return "orig_r3";
+ case PERF_REG_POWERPC_CTR:
+ return "ctr";
+ case PERF_REG_POWERPC_LNK:
+ return "link";
+ case PERF_REG_POWERPC_XER:
+ return "xer";
+ case PERF_REG_POWERPC_CCR:
+ return "ccr";
+#ifdef __powerpc64__
+ case PERF_REG_POWERPC_SOFTE:
+ return "softe";
+#else
+ case PERF_REG_POWERPC_MQ:
+ return "mq";
+#endif
+ case PERF_REG_POWERPC_TRAP:
+ return "trap";
+ case PERF_REG_POWERPC_DAR:
+ return "dar";
+ case PERF_REG_POWERPC_DSISR:
+ return "dsisr";
+ case PERF_REG_POWERPC_RESULT:
+ return "result";
+ default:
+ return NULL;
+ }
+ return NULL;
+}
+#endif /*ARCH_PERF_REGS_H */
--
2.1.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [RFC][PATCH 3/3]perf/powerpc :add support for sampling intr machine state
2015-10-19 12:18 [RFC][PATCH 0/3]perf/powerpc:Add ability to sample intr machine state in powerpc Anju T
2015-10-19 12:18 ` [PATCH 1/3] perf/powerpc:add ability to sample intr machine state in power Anju T
2015-10-19 12:18 ` [RFC][PATCH 2/3] tools/perf:Map the ID values with register names Anju T
@ 2015-10-19 12:18 ` Anju T
2015-10-20 4:20 ` Madhavan Srinivasan
2 siblings, 1 reply; 8+ messages in thread
From: Anju T @ 2015-10-19 12:18 UTC (permalink / raw)
To: linux-kernel
Cc: linuxppc-dev, sukadev, acme, mpe, dsahern, jolsa, maddy, khandual,
hemant, Anju
From: Anju <anju@linux.vnet.ibm.com>
The registers to sample are passed through the sample_regs_intr bitmask.
The name and bit position for each register is defined in asm/perf_regs.h.
This feature can be enabled by using -I option with perf record command.
To display the sampled register values use perf script -D.
The kernel uses the "PERF" register ids to find offset of the register in 'struct pt_regs'.
CONFIG_HAVE_PERF_REGS will enable sampling of the interrupted machine state.
Signed-off-by: Anju T <anju@linux.vnet.ibm.com>
---
arch/powerpc/Kconfig | 1 +
arch/powerpc/perf/Makefile | 2 +-
arch/powerpc/perf/perf_regs.c | 85 +++++++++++++++++++++++++++++++++++++++++++
tools/perf/config/Makefile | 4 ++
4 files changed, 91 insertions(+), 1 deletion(-)
create mode 100644 arch/powerpc/perf/perf_regs.c
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 9a7057e..c4ce60d 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -119,6 +119,7 @@ config PPC
select GENERIC_ATOMIC64 if PPC32
select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
select HAVE_PERF_EVENTS
+ select HAVE_PERF_REGS
select HAVE_REGS_AND_STACK_ACCESS_API
select HAVE_HW_BREAKPOINT if PERF_EVENTS && PPC_BOOK3S_64
select ARCH_WANT_IPC_PARSE_VERSION
diff --git a/arch/powerpc/perf/Makefile b/arch/powerpc/perf/Makefile
index f9c083a..8e7f545 100644
--- a/arch/powerpc/perf/Makefile
+++ b/arch/powerpc/perf/Makefile
@@ -7,7 +7,7 @@ obj64-$(CONFIG_PPC_PERF_CTRS) += power4-pmu.o ppc970-pmu.o power5-pmu.o \
power5+-pmu.o power6-pmu.o power7-pmu.o \
power8-pmu.o
obj32-$(CONFIG_PPC_PERF_CTRS) += mpc7450-pmu.o
-
+obj-$(CONFIG_PERF_EVENTS) += perf_regs.o
obj-$(CONFIG_FSL_EMB_PERF_EVENT) += core-fsl-emb.o
obj-$(CONFIG_FSL_EMB_PERF_EVENT_E500) += e500-pmu.o e6500-pmu.o
diff --git a/arch/powerpc/perf/perf_regs.c b/arch/powerpc/perf/perf_regs.c
new file mode 100644
index 0000000..7a71de2
--- /dev/null
+++ b/arch/powerpc/perf/perf_regs.c
@@ -0,0 +1,85 @@
+#include <linux/errno.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/perf_event.h>
+#include <linux/bug.h>
+#include <linux/stddef.h>
+#include <asm/ptrace.h>
+#include <asm/perf_regs.h>
+
+#define PT_REGS_OFFSET(id, r) [id] = offsetof(struct pt_regs, r)
+
+#define REG_RESERVED (~((1ULL << PERF_REG_POWERPC_MAX) - 1))
+
+static unsigned int pt_regs_offset[PERF_REG_POWERPC_MAX] = {
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR0, gpr[0]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR1, gpr[1]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR2, gpr[2]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR3, gpr[3]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR4, gpr[4]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR5, gpr[5]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR6, gpr[6]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR7, gpr[7]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR8, gpr[8]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR9, gpr[9]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR10, gpr[10]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR11, gpr[11]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR12, gpr[12]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR13, gpr[13]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR14, gpr[14]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR15, gpr[15]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR16, gpr[16]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR17, gpr[17]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR18, gpr[18]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR19, gpr[19]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR20, gpr[20]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR21, gpr[21]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR22, gpr[22]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR23, gpr[23]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR24, gpr[24]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR25, gpr[25]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR26, gpr[26]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR27, gpr[27]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR28, gpr[28]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR29, gpr[29]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR30, gpr[30]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_GPR31, gpr[31]),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_NIP, nip),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_MSR, msr),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_ORIG_R3, orig_gpr3),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_CTR, ctr),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_LNK, link),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_XER, xer),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_CCR, ccr),
+#ifdef __powerpc64__
+ PT_REGS_OFFSET(PERF_REG_POWERPC_SOFTE, softe),
+#else
+ PT_REGS_OFFSET(PERF_REG_POWERPC_MQ, mq),
+#endif
+ PT_REGS_OFFSET(PERF_REG_POWERPC_TRAP, trap),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_DAR, dar),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_DSISR, dsisr),
+ PT_REGS_OFFSET(PERF_REG_POWERPC_RESULT, result),
+};
+u64 perf_reg_value(struct pt_regs *regs, int idx)
+{
+ if (WARN_ON_ONCE(idx >= PERF_REG_POWERPC_MAX))
+ return 0;
+ return regs_get_register(regs, pt_regs_offset[idx]);
+}
+int perf_reg_validate(u64 mask)
+{
+ if (!mask || mask & REG_RESERVED)
+ return -EINVAL;
+ return 0;
+}
+u64 perf_reg_abi(struct task_struct *task)
+{
+ return PERF_SAMPLE_REGS_ABI_64;
+}
+void perf_get_regs_user(struct perf_regs *regs_user,
+ struct pt_regs *regs,
+ struct pt_regs *regs_user_copy)
+{
+ return;
+}
diff --git a/tools/perf/config/Makefile b/tools/perf/config/Makefile
index 827557f..4da9190 100644
--- a/tools/perf/config/Makefile
+++ b/tools/perf/config/Makefile
@@ -22,6 +22,10 @@ include $(src-perf)/config/Makefile.arch
$(call detected_var,ARCH)
NO_PERF_REGS := 1
+#Additional ARCH settings for ppc64
+ifeq ($(ARCH),powerpc)
+ NO_PERF_REGS :=0
+endif
# Additional ARCH settings for x86
ifeq ($(ARCH),x86)
--
2.1.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 1/3] perf/powerpc:add ability to sample intr machine state in power
2015-10-19 12:18 ` [PATCH 1/3] perf/powerpc:add ability to sample intr machine state in power Anju T
@ 2015-10-20 4:16 ` Madhavan Srinivasan
2015-10-20 6:43 ` AnjuTSudhakar
0 siblings, 1 reply; 8+ messages in thread
From: Madhavan Srinivasan @ 2015-10-20 4:16 UTC (permalink / raw)
To: linux-kernel, Anju
Cc: linuxppc-dev, sukadev, acme, mpe, dsahern, jolsa, khandual,
hemant
On Monday 19 October 2015 05:48 PM, Anju T wrote:
> From: Anju <anju@linux.vnet.ibm.com>
>
> The enum definition assigns an 'id' to each register in power.
I guess it should be "each register in "struct pt_regs" of arch/powerpc
> The order of these values in the enum definition are based on
> the corresponding macros in arch/powerpc/include/uapi/asm/ptrace.h .
>
> Signed-off-by: Anju T <anju@linux.vnet.ibm.com>
> ---
> arch/powerpc/include/uapi/asm/perf_regs.h | 55 +++++++++++++++++++++++++++++++
> 1 file changed, 55 insertions(+)
> create mode 100644 arch/powerpc/include/uapi/asm/perf_regs.h
>
> diff --git a/arch/powerpc/include/uapi/asm/perf_regs.h b/arch/powerpc/include/uapi/asm/perf_regs.h
> new file mode 100644
> index 0000000..b97727c
> --- /dev/null
> +++ b/arch/powerpc/include/uapi/asm/perf_regs.h
> @@ -0,0 +1,55 @@
> +#ifndef _ASM_POWERPC_PERF_REGS_H
> +#define _ASM_POWERPC_PERF_REGS_H
> +
> +enum perf_event_powerpc_regs {
> + PERF_REG_POWERPC_GPR0,
> + PERF_REG_POWERPC_GPR1,
> + PERF_REG_POWERPC_GPR2,
> + PERF_REG_POWERPC_GPR3,
> + PERF_REG_POWERPC_GPR4,
> + PERF_REG_POWERPC_GPR5,
> + PERF_REG_POWERPC_GPR6,
> + PERF_REG_POWERPC_GPR7,
> + PERF_REG_POWERPC_GPR8,
> + PERF_REG_POWERPC_GPR9,
> + PERF_REG_POWERPC_GPR10,
> + PERF_REG_POWERPC_GPR11,
> + PERF_REG_POWERPC_GPR12,
> + PERF_REG_POWERPC_GPR13,
> + PERF_REG_POWERPC_GPR14,
> + PERF_REG_POWERPC_GPR15,
> + PERF_REG_POWERPC_GPR16,
> + PERF_REG_POWERPC_GPR17,
> + PERF_REG_POWERPC_GPR18,
> + PERF_REG_POWERPC_GPR19,
> + PERF_REG_POWERPC_GPR20,
> + PERF_REG_POWERPC_GPR21,
> + PERF_REG_POWERPC_GPR22,
> + PERF_REG_POWERPC_GPR23,
> + PERF_REG_POWERPC_GPR24,
> + PERF_REG_POWERPC_GPR25,
> + PERF_REG_POWERPC_GPR26,
> + PERF_REG_POWERPC_GPR27,
> + PERF_REG_POWERPC_GPR28,
> + PERF_REG_POWERPC_GPR29,
> + PERF_REG_POWERPC_GPR30,
> + PERF_REG_POWERPC_GPR31,
> + PERF_REG_POWERPC_NIP,
> + PERF_REG_POWERPC_MSR,
> + PERF_REG_POWERPC_ORIG_R3,
> + PERF_REG_POWERPC_CTR,
> + PERF_REG_POWERPC_LNK,
> + PERF_REG_POWERPC_XER,
> + PERF_REG_POWERPC_CCR,
> +#ifdef __powerpc64__
> + PERF_REG_POWERPC_SOFTE,
> +#else
> + PERF_REG_POWERPC_MQ,
> +#endif
> + PERF_REG_POWERPC_TRAP,
> + PERF_REG_POWERPC_DAR,
> + PERF_REG_POWERPC_DSISR,
> + PERF_REG_POWERPC_RESULT,
> + PERF_REG_POWERPC_MAX,
> +};
> +#endif /* _ASM_POWERPC_PERF_REGS_H */
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [RFC][PATCH 3/3]perf/powerpc :add support for sampling intr machine state
2015-10-19 12:18 ` [RFC][PATCH 3/3]perf/powerpc :add support for sampling intr machine state Anju T
@ 2015-10-20 4:20 ` Madhavan Srinivasan
2015-10-20 6:45 ` AnjuTSudhakar
0 siblings, 1 reply; 8+ messages in thread
From: Madhavan Srinivasan @ 2015-10-20 4:20 UTC (permalink / raw)
To: linux-kernel, Anju
Cc: linuxppc-dev, sukadev, acme, mpe, dsahern, jolsa, khandual,
hemant
On Monday 19 October 2015 05:48 PM, Anju T wrote:
> From: Anju <anju@linux.vnet.ibm.com>
>
> The registers to sample are passed through the sample_regs_intr bitmask.
> The name and bit position for each register is defined in asm/perf_regs.h.
> This feature can be enabled by using -I option with perf record command.
> To display the sampled register values use perf script -D.
> The kernel uses the "PERF" register ids to find offset of the register in 'struct pt_regs'.
> CONFIG_HAVE_PERF_REGS will enable sampling of the interrupted machine state.
>
> Signed-off-by: Anju T <anju@linux.vnet.ibm.com>
> ---
> arch/powerpc/Kconfig | 1 +
> arch/powerpc/perf/Makefile | 2 +-
> arch/powerpc/perf/perf_regs.c | 85 +++++++++++++++++++++++++++++++++++++++++++
> tools/perf/config/Makefile | 4 ++
> 4 files changed, 91 insertions(+), 1 deletion(-)
> create mode 100644 arch/powerpc/perf/perf_regs.c
>
> diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
> index 9a7057e..c4ce60d 100644
> --- a/arch/powerpc/Kconfig
> +++ b/arch/powerpc/Kconfig
> @@ -119,6 +119,7 @@ config PPC
> select GENERIC_ATOMIC64 if PPC32
> select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
> select HAVE_PERF_EVENTS
> + select HAVE_PERF_REGS
> select HAVE_REGS_AND_STACK_ACCESS_API
> select HAVE_HW_BREAKPOINT if PERF_EVENTS && PPC_BOOK3S_64
> select ARCH_WANT_IPC_PARSE_VERSION
> diff --git a/arch/powerpc/perf/Makefile b/arch/powerpc/perf/Makefile
> index f9c083a..8e7f545 100644
> --- a/arch/powerpc/perf/Makefile
> +++ b/arch/powerpc/perf/Makefile
> @@ -7,7 +7,7 @@ obj64-$(CONFIG_PPC_PERF_CTRS) += power4-pmu.o ppc970-pmu.o power5-pmu.o \
> power5+-pmu.o power6-pmu.o power7-pmu.o \
> power8-pmu.o
> obj32-$(CONFIG_PPC_PERF_CTRS) += mpc7450-pmu.o
> -
> +obj-$(CONFIG_PERF_EVENTS) += perf_regs.o
> obj-$(CONFIG_FSL_EMB_PERF_EVENT) += core-fsl-emb.o
> obj-$(CONFIG_FSL_EMB_PERF_EVENT_E500) += e500-pmu.o e6500-pmu.o
>
> diff --git a/arch/powerpc/perf/perf_regs.c b/arch/powerpc/perf/perf_regs.c
> new file mode 100644
> index 0000000..7a71de2
> --- /dev/null
> +++ b/arch/powerpc/perf/perf_regs.c
> @@ -0,0 +1,85 @@
> +#include <linux/errno.h>
> +#include <linux/kernel.h>
> +#include <linux/sched.h>
> +#include <linux/perf_event.h>
> +#include <linux/bug.h>
> +#include <linux/stddef.h>
> +#include <asm/ptrace.h>
> +#include <asm/perf_regs.h>
> +
> +#define PT_REGS_OFFSET(id, r) [id] = offsetof(struct pt_regs, r)
> +
> +#define REG_RESERVED (~((1ULL << PERF_REG_POWERPC_MAX) - 1))
> +
> +static unsigned int pt_regs_offset[PERF_REG_POWERPC_MAX] = {
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR0, gpr[0]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR1, gpr[1]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR2, gpr[2]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR3, gpr[3]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR4, gpr[4]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR5, gpr[5]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR6, gpr[6]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR7, gpr[7]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR8, gpr[8]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR9, gpr[9]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR10, gpr[10]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR11, gpr[11]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR12, gpr[12]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR13, gpr[13]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR14, gpr[14]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR15, gpr[15]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR16, gpr[16]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR17, gpr[17]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR18, gpr[18]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR19, gpr[19]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR20, gpr[20]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR21, gpr[21]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR22, gpr[22]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR23, gpr[23]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR24, gpr[24]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR25, gpr[25]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR26, gpr[26]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR27, gpr[27]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR28, gpr[28]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR29, gpr[29]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR30, gpr[30]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR31, gpr[31]),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_NIP, nip),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_MSR, msr),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_ORIG_R3, orig_gpr3),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_CTR, ctr),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_LNK, link),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_XER, xer),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_CCR, ccr),
> +#ifdef __powerpc64__
> + PT_REGS_OFFSET(PERF_REG_POWERPC_SOFTE, softe),
> +#else
> + PT_REGS_OFFSET(PERF_REG_POWERPC_MQ, mq),
> +#endif
> + PT_REGS_OFFSET(PERF_REG_POWERPC_TRAP, trap),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_DAR, dar),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_DSISR, dsisr),
> + PT_REGS_OFFSET(PERF_REG_POWERPC_RESULT, result),
> +};
> +u64 perf_reg_value(struct pt_regs *regs, int idx)
> +{
> + if (WARN_ON_ONCE(idx >= PERF_REG_POWERPC_MAX))
> + return 0;
> + return regs_get_register(regs, pt_regs_offset[idx]);
> +}
> +int perf_reg_validate(u64 mask)
> +{
> + if (!mask || mask & REG_RESERVED)
> + return -EINVAL;
> + return 0;
> +}
> +u64 perf_reg_abi(struct task_struct *task)
> +{
> + return PERF_SAMPLE_REGS_ABI_64;
> +}
> +void perf_get_regs_user(struct perf_regs *regs_user,
> + struct pt_regs *regs,
> + struct pt_regs *regs_user_copy)
> +{
Kindly add comment to update the function when
enabling perf_sample_reg_user.
Maddy
> + return;
> +}
> diff --git a/tools/perf/config/Makefile b/tools/perf/config/Makefile
> index 827557f..4da9190 100644
> --- a/tools/perf/config/Makefile
> +++ b/tools/perf/config/Makefile
> @@ -22,6 +22,10 @@ include $(src-perf)/config/Makefile.arch
> $(call detected_var,ARCH)
>
> NO_PERF_REGS := 1
> +#Additional ARCH settings for ppc64
> +ifeq ($(ARCH),powerpc)
> + NO_PERF_REGS :=0
> +endif
>
> # Additional ARCH settings for x86
> ifeq ($(ARCH),x86)
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/3] perf/powerpc:add ability to sample intr machine state in power
2015-10-20 4:16 ` Madhavan Srinivasan
@ 2015-10-20 6:43 ` AnjuTSudhakar
0 siblings, 0 replies; 8+ messages in thread
From: AnjuTSudhakar @ 2015-10-20 6:43 UTC (permalink / raw)
To: Madhavan Srinivasan, linux-kernel
Cc: linuxppc-dev, sukadev, acme, mpe, dsahern, jolsa, khandual,
hemant
Hi maddy,
On Tuesday 20 October 2015 09:46 AM, Madhavan Srinivasan wrote:
>
> On Monday 19 October 2015 05:48 PM, Anju T wrote:
>> From: Anju <anju@linux.vnet.ibm.com>
>>
>> The enum definition assigns an 'id' to each register in power.
> I guess it should be "each register in "struct pt_regs" of arch/powerpc
Right, that seems better.Will change the description like that.
Thanks a lot for reviewing the patch .
>> The order of these values in the enum definition are based on
>> the corresponding macros in arch/powerpc/include/uapi/asm/ptrace.h .
>>
>> Signed-off-by: Anju T <anju@linux.vnet.ibm.com>
>> ---
>> arch/powerpc/include/uapi/asm/perf_regs.h | 55 +++++++++++++++++++++++++++++++
>> 1 file changed, 55 insertions(+)
>> create mode 100644 arch/powerpc/include/uapi/asm/perf_regs.h
>>
>> diff --git a/arch/powerpc/include/uapi/asm/perf_regs.h b/arch/powerpc/include/uapi/asm/perf_regs.h
>> new file mode 100644
>> index 0000000..b97727c
>> --- /dev/null
>> +++ b/arch/powerpc/include/uapi/asm/perf_regs.h
>> @@ -0,0 +1,55 @@
>> +#ifndef _ASM_POWERPC_PERF_REGS_H
>> +#define _ASM_POWERPC_PERF_REGS_H
>> +
>> +enum perf_event_powerpc_regs {
>> + PERF_REG_POWERPC_GPR0,
>> + PERF_REG_POWERPC_GPR1,
>> + PERF_REG_POWERPC_GPR2,
>> + PERF_REG_POWERPC_GPR3,
>> + PERF_REG_POWERPC_GPR4,
>> + PERF_REG_POWERPC_GPR5,
>> + PERF_REG_POWERPC_GPR6,
>> + PERF_REG_POWERPC_GPR7,
>> + PERF_REG_POWERPC_GPR8,
>> + PERF_REG_POWERPC_GPR9,
>> + PERF_REG_POWERPC_GPR10,
>> + PERF_REG_POWERPC_GPR11,
>> + PERF_REG_POWERPC_GPR12,
>> + PERF_REG_POWERPC_GPR13,
>> + PERF_REG_POWERPC_GPR14,
>> + PERF_REG_POWERPC_GPR15,
>> + PERF_REG_POWERPC_GPR16,
>> + PERF_REG_POWERPC_GPR17,
>> + PERF_REG_POWERPC_GPR18,
>> + PERF_REG_POWERPC_GPR19,
>> + PERF_REG_POWERPC_GPR20,
>> + PERF_REG_POWERPC_GPR21,
>> + PERF_REG_POWERPC_GPR22,
>> + PERF_REG_POWERPC_GPR23,
>> + PERF_REG_POWERPC_GPR24,
>> + PERF_REG_POWERPC_GPR25,
>> + PERF_REG_POWERPC_GPR26,
>> + PERF_REG_POWERPC_GPR27,
>> + PERF_REG_POWERPC_GPR28,
>> + PERF_REG_POWERPC_GPR29,
>> + PERF_REG_POWERPC_GPR30,
>> + PERF_REG_POWERPC_GPR31,
>> + PERF_REG_POWERPC_NIP,
>> + PERF_REG_POWERPC_MSR,
>> + PERF_REG_POWERPC_ORIG_R3,
>> + PERF_REG_POWERPC_CTR,
>> + PERF_REG_POWERPC_LNK,
>> + PERF_REG_POWERPC_XER,
>> + PERF_REG_POWERPC_CCR,
>> +#ifdef __powerpc64__
>> + PERF_REG_POWERPC_SOFTE,
>> +#else
>> + PERF_REG_POWERPC_MQ,
>> +#endif
>> + PERF_REG_POWERPC_TRAP,
>> + PERF_REG_POWERPC_DAR,
>> + PERF_REG_POWERPC_DSISR,
>> + PERF_REG_POWERPC_RESULT,
>> + PERF_REG_POWERPC_MAX,
>> +};
>> +#endif /* _ASM_POWERPC_PERF_REGS_H */
Thanks
Anju
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [RFC][PATCH 3/3]perf/powerpc :add support for sampling intr machine state
2015-10-20 4:20 ` Madhavan Srinivasan
@ 2015-10-20 6:45 ` AnjuTSudhakar
0 siblings, 0 replies; 8+ messages in thread
From: AnjuTSudhakar @ 2015-10-20 6:45 UTC (permalink / raw)
To: Madhavan Srinivasan, linux-kernel
Cc: linuxppc-dev, sukadev, acme, mpe, dsahern, jolsa, khandual,
hemant
On Tuesday 20 October 2015 09:50 AM, Madhavan Srinivasan wrote:
>
> On Monday 19 October 2015 05:48 PM, Anju T wrote:
>> From: Anju <anju@linux.vnet.ibm.com>
>>
>> The registers to sample are passed through the sample_regs_intr bitmask.
>> The name and bit position for each register is defined in asm/perf_regs.h.
>> This feature can be enabled by using -I option with perf record command.
>> To display the sampled register values use perf script -D.
>> The kernel uses the "PERF" register ids to find offset of the register in 'struct pt_regs'.
>> CONFIG_HAVE_PERF_REGS will enable sampling of the interrupted machine state.
>>
>> Signed-off-by: Anju T <anju@linux.vnet.ibm.com>
>> ---
>> arch/powerpc/Kconfig | 1 +
>> arch/powerpc/perf/Makefile | 2 +-
>> arch/powerpc/perf/perf_regs.c | 85 +++++++++++++++++++++++++++++++++++++++++++
>> tools/perf/config/Makefile | 4 ++
>> 4 files changed, 91 insertions(+), 1 deletion(-)
>> create mode 100644 arch/powerpc/perf/perf_regs.c
>>
>> diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
>> index 9a7057e..c4ce60d 100644
>> --- a/arch/powerpc/Kconfig
>> +++ b/arch/powerpc/Kconfig
>> @@ -119,6 +119,7 @@ config PPC
>> select GENERIC_ATOMIC64 if PPC32
>> select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
>> select HAVE_PERF_EVENTS
>> + select HAVE_PERF_REGS
>> select HAVE_REGS_AND_STACK_ACCESS_API
>> select HAVE_HW_BREAKPOINT if PERF_EVENTS && PPC_BOOK3S_64
>> select ARCH_WANT_IPC_PARSE_VERSION
>> diff --git a/arch/powerpc/perf/Makefile b/arch/powerpc/perf/Makefile
>> index f9c083a..8e7f545 100644
>> --- a/arch/powerpc/perf/Makefile
>> +++ b/arch/powerpc/perf/Makefile
>> @@ -7,7 +7,7 @@ obj64-$(CONFIG_PPC_PERF_CTRS) += power4-pmu.o ppc970-pmu.o power5-pmu.o \
>> power5+-pmu.o power6-pmu.o power7-pmu.o \
>> power8-pmu.o
>> obj32-$(CONFIG_PPC_PERF_CTRS) += mpc7450-pmu.o
>> -
>> +obj-$(CONFIG_PERF_EVENTS) += perf_regs.o
>> obj-$(CONFIG_FSL_EMB_PERF_EVENT) += core-fsl-emb.o
>> obj-$(CONFIG_FSL_EMB_PERF_EVENT_E500) += e500-pmu.o e6500-pmu.o
>>
>> diff --git a/arch/powerpc/perf/perf_regs.c b/arch/powerpc/perf/perf_regs.c
>> new file mode 100644
>> index 0000000..7a71de2
>> --- /dev/null
>> +++ b/arch/powerpc/perf/perf_regs.c
>> @@ -0,0 +1,85 @@
>> +#include <linux/errno.h>
>> +#include <linux/kernel.h>
>> +#include <linux/sched.h>
>> +#include <linux/perf_event.h>
>> +#include <linux/bug.h>
>> +#include <linux/stddef.h>
>> +#include <asm/ptrace.h>
>> +#include <asm/perf_regs.h>
>> +
>> +#define PT_REGS_OFFSET(id, r) [id] = offsetof(struct pt_regs, r)
>> +
>> +#define REG_RESERVED (~((1ULL << PERF_REG_POWERPC_MAX) - 1))
>> +
>> +static unsigned int pt_regs_offset[PERF_REG_POWERPC_MAX] = {
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR0, gpr[0]),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR1, gpr[1]),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR2, gpr[2]),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR3, gpr[3]),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR4, gpr[4]),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR5, gpr[5]),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR6, gpr[6]),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR7, gpr[7]),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR8, gpr[8]),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR9, gpr[9]),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR10, gpr[10]),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR11, gpr[11]),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR12, gpr[12]),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR13, gpr[13]),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR14, gpr[14]),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR15, gpr[15]),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR16, gpr[16]),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR17, gpr[17]),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR18, gpr[18]),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR19, gpr[19]),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR20, gpr[20]),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR21, gpr[21]),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR22, gpr[22]),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR23, gpr[23]),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR24, gpr[24]),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR25, gpr[25]),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR26, gpr[26]),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR27, gpr[27]),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR28, gpr[28]),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR29, gpr[29]),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR30, gpr[30]),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_GPR31, gpr[31]),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_NIP, nip),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_MSR, msr),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_ORIG_R3, orig_gpr3),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_CTR, ctr),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_LNK, link),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_XER, xer),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_CCR, ccr),
>> +#ifdef __powerpc64__
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_SOFTE, softe),
>> +#else
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_MQ, mq),
>> +#endif
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_TRAP, trap),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_DAR, dar),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_DSISR, dsisr),
>> + PT_REGS_OFFSET(PERF_REG_POWERPC_RESULT, result),
>> +};
>> +u64 perf_reg_value(struct pt_regs *regs, int idx)
>> +{
>> + if (WARN_ON_ONCE(idx >= PERF_REG_POWERPC_MAX))
>> + return 0;
>> + return regs_get_register(regs, pt_regs_offset[idx]);
>> +}
>> +int perf_reg_validate(u64 mask)
>> +{
>> + if (!mask || mask & REG_RESERVED)
>> + return -EINVAL;
>> + return 0;
>> +}
>> +u64 perf_reg_abi(struct task_struct *task)
>> +{
>> + return PERF_SAMPLE_REGS_ABI_64;
>> +}
>> +void perf_get_regs_user(struct perf_regs *regs_user,
>> + struct pt_regs *regs,
>> + struct pt_regs *regs_user_copy)
>> +{
> Kindly add comment to update the function when
> enabling perf_sample_reg_user.
>
> Maddy
Ok . will add that.
>> + return;
>> +}
>> diff --git a/tools/perf/config/Makefile b/tools/perf/config/Makefile
>> index 827557f..4da9190 100644
>> --- a/tools/perf/config/Makefile
>> +++ b/tools/perf/config/Makefile
>> @@ -22,6 +22,10 @@ include $(src-perf)/config/Makefile.arch
>> $(call detected_var,ARCH)
>>
>> NO_PERF_REGS := 1
>> +#Additional ARCH settings for ppc64
>> +ifeq ($(ARCH),powerpc)
>> + NO_PERF_REGS :=0
>> +endif
>>
>> # Additional ARCH settings for x86
>> ifeq ($(ARCH),x86)
Thanks
Anju
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2015-10-20 6:45 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2015-10-19 12:18 [RFC][PATCH 0/3]perf/powerpc:Add ability to sample intr machine state in powerpc Anju T
2015-10-19 12:18 ` [PATCH 1/3] perf/powerpc:add ability to sample intr machine state in power Anju T
2015-10-20 4:16 ` Madhavan Srinivasan
2015-10-20 6:43 ` AnjuTSudhakar
2015-10-19 12:18 ` [RFC][PATCH 2/3] tools/perf:Map the ID values with register names Anju T
2015-10-19 12:18 ` [RFC][PATCH 3/3]perf/powerpc :add support for sampling intr machine state Anju T
2015-10-20 4:20 ` Madhavan Srinivasan
2015-10-20 6:45 ` AnjuTSudhakar
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