From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753258AbbJZHiA (ORCPT ); Mon, 26 Oct 2015 03:38:00 -0400 Received: from szxga03-in.huawei.com ([119.145.14.66]:11970 "EHLO szxga03-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753090AbbJZHh6 (ORCPT ); Mon, 26 Oct 2015 03:37:58 -0400 Message-ID: <562DD839.8050504@hisilicon.com> Date: Mon, 26 Oct 2015 15:37:29 +0800 From: Zhou Wang User-Agent: Mozilla/5.0 (Windows NT 6.1; rv:17.0) Gecko/20130509 Thunderbird/17.0.6 MIME-Version: 1.0 To: Bjorn Helgaas CC: Bjorn Helgaas , , , Arnd Bergmann , , , , , , , , , , , , , , , , , , , , Subject: Re: [PATCH v11 3/6] PCI: designware: Add ARM64 support References: <1444991021-109306-1-git-send-email-wangzhou1@hisilicon.com> <1444991021-109306-4-git-send-email-wangzhou1@hisilicon.com> <20151022182853.GC21237@localhost> In-Reply-To: <20151022182853.GC21237@localhost> Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.66.65.131] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090203.562DD849.00CA,ss=1,re=0.000,recu=0.000,reip=0.000,cl=1,cld=1,fgs=0, ip=0.0.0.0, so=2013-05-26 15:14:31, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 3a1e9434e4ee11cbd1adc7a8f9fd2a92 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2015/10/23 2:28, Bjorn Helgaas wrote: > Hi Zhou, > > On Fri, Oct 16, 2015 at 06:23:38PM +0800, Zhou Wang wrote: >> This patch tries to unify ARM32 and ARM64 PCIe in designware driver. Delete >> function dw_pcie_setup, dw_pcie_scan_bus, dw_pcie_map_irq and struct hw_pci, >> move related operations to dw_pcie_host_init. >> >> This patch also try to use of_pci_get_host_bridge_resources for ARM32 and ARM64 >> according to the suggestion for Gabriele[1] >> >> This patch reverts commit f4c55c5a3f7f ("PCI: designware: Program ATU with >> untranslated address") based on 1/6 in this series. we delete *_mod_base in >> pcie-designware. This was discussed in [2] >> >> I have compiled the driver with multi_v7_defconfig. However, I don't have >> ARM32 PCIe related board to do test. It will be appreciated if someone could >> help to test it. > > There's a lot going on this patch. Can you split it up at all? For > example, maybe: > Hi Bjorn, No problem, I will split this patch to three patches. > - Revert f4c55c5a3f7f (and move to right after the related [1/6] > patch > > - Switch to using of_pci_get_host_bridge_resources() > > - Replacing the call of pci_common_init_dev() with equivalent code in > pcie-designware.c. This one in particular needs to be easy to review. > It's not clear to me that this new code is equivalent. For example, > pci_common_init_dev() calls pcie_bus_configure_settings(), but I don't > see that in your new code. I will add pcie_bus_configure_settings in v12. Thanks, Zhou > > You already have acks and tested-by, so I assume you probably did all the > right things, but it will help me out a lot if you can break it into > bite-sized pieces. It's always better to make patches too small rather > than too large, because it's trivial to squash them back together if > needed. I think we're going to have some conflicts between this and other > pcie-designware.c changes, and small patches will also make those easier to > resolve. > > Bjorn > > . >