From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932195AbbKYJDc (ORCPT ); Wed, 25 Nov 2015 04:03:32 -0500 Received: from regular1.263xmail.com ([211.150.99.134]:41689 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754767AbbKYJD1 (ORCPT ); Wed, 25 Nov 2015 04:03:27 -0500 X-263anti-spam: KSV:0;BIG:0;ABS:1;DNS:0;ATT:0;SPF:S; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 1 X-SKE-CHECKED: 1 X-ADDR-CHECKED: 0 X-RL-SENDER: wxt@rock-chips.com X-FST-TO: linux-arm-kernel@lists.infradead.org X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: wxt@rock-chips.com X-UNIQUE-TAG: <631834795c6417e10524e8446ca64446> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Subject: Re: [PATCH] ASoC: rockchip: Fix incorrect VDW value for 24 bit To: Sjoerd Simons , Mark Brown References: <1448441651-444-1-git-send-email-sjoerd.simons@collabora.co.uk> Cc: alsa-devel@alsa-project.org, Heiko Stuebner , Liam Girdwood , Takashi Iwai , linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Jaroslav Kysela , linux-arm-kernel@lists.infradead.org From: Caesar Wang Message-ID: <56557951.7070401@rock-chips.com> Date: Wed, 25 Nov 2015 17:03:13 +0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.2.0 MIME-Version: 1.0 In-Reply-To: <1448441651-444-1-git-send-email-sjoerd.simons@collabora.co.uk> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, 在 2015年11月25日 16:54, Sjoerd Simons 写道: > Correct valid data word register value for 24 bit data width. The > bit value should be 10 (aka 0x2), not 0x10. > > This fixes playback of 24 bit audio. > > Signed-off-by: Sjoerd Simons > > --- > > sound/soc/rockchip/rockchip_spdif.h | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/sound/soc/rockchip/rockchip_spdif.h b/sound/soc/rockchip/rockchip_spdif.h > index 07f86a2..921b409 100644 > --- a/sound/soc/rockchip/rockchip_spdif.h > +++ b/sound/soc/rockchip/rockchip_spdif.h > @@ -28,9 +28,9 @@ > #define SPDIF_CFGR_VDW(x) (x << SPDIF_CFGR_VDW_SHIFT) > #define SDPIF_CFGR_VDW_MASK (0xf << SPDIF_CFGR_VDW_SHIFT) > > -#define SPDIF_CFGR_VDW_16 SPDIF_CFGR_VDW(0x00) > -#define SPDIF_CFGR_VDW_20 SPDIF_CFGR_VDW(0x01) > -#define SPDIF_CFGR_VDW_24 SPDIF_CFGR_VDW(0x10) > +#define SPDIF_CFGR_VDW_16 SPDIF_CFGR_VDW(0x0) > +#define SPDIF_CFGR_VDW_20 SPDIF_CFGR_VDW(0x1) > +#define SPDIF_CFGR_VDW_24 SPDIF_CFGR_VDW(0x2) Yep, From the TRM says: (RK3288/RK3368...) VDW Valid data width 00: 16bit 01: 20bit 10: 24bit 11: reserved .... So feel free add my tag: Reviewed-by: Caesar Wang > > /* > * DMACR -- caesar wang | software engineer | wxt@rock-chip.com