From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933202AbbLHIHr (ORCPT ); Tue, 8 Dec 2015 03:07:47 -0500 Received: from mailout2.w1.samsung.com ([210.118.77.12]:55148 "EHLO mailout2.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933124AbbLHIH1 (ORCPT ); Tue, 8 Dec 2015 03:07:27 -0500 X-AuditID: cbfec7f4-f79026d00000418a-d1-56668fbb5aed Subject: Re: [PATCH v4 6/8] ARM: dts: Exynos5800: fix CPU OPP To: Bartlomiej Zolnierkiewicz , Thomas Abraham , Sylwester Nawrocki , Mike Turquette , Kukjin Kim , Kukjin Kim , Viresh Kumar , Ben Gamari References: <1449512300-17230-1-git-send-email-b.zolnierkie@samsung.com> <1449512300-17230-7-git-send-email-b.zolnierkie@samsung.com> Cc: Tomasz Figa , Lukasz Majewski , Heiko Stuebner , Chanwoo Choi , Kevin Hilman , Javier Martinez Canillas , Tobias Jakobi , Anand Moon , linux-samsung-soc@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Doug Anderson , Andreas Faerber , Sachin Kamat From: Krzysztof Kozlowski X-Enigmail-Draft-Status: N1110 Message-id: <56668FAC.2000702@samsung.com> Date: Tue, 08 Dec 2015 17:07:08 +0900 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.4.0 MIME-version: 1.0 In-reply-to: <1449512300-17230-7-git-send-email-b.zolnierkie@samsung.com> Content-type: text/plain; charset=windows-1252 Content-transfer-encoding: 7bit X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrGIsWRmVeSWpSXmKPExsVy+t/xa7q7+9PCDL4tMLRo3lRssXHGelaL WfPvslhc//Kc1eLssoNsFv8fvWa1ePN2DZPF6xeGFr0LrrJZ9D9+zWzx9fAKRos3DzczWmx6 fI3V4vKuOWwWn3uPMFrMOL+PyWLdxlvsFk8nXGSzOPymndXi5J9eRouOZYwWbas/sFqs2vWH 0WLjVw8HCY/ZDRdZPHbOusvusWlVJ5vHnWt72Dw2L6n3+HeM3WNLP1C4b8sqRo8zv509tl+b x+yx+XS1x+dNcgE8UVw2Kak5mWWpRfp2CVwZBxY0MBY8NaqYevU0cwNjv3oXIyeHhICJxI+l F1ghbDGJC/fWs3UxcnEICSxllDi4fi4jhPOLUWJfbwdYlbCArcTDQ4/ZQRIiAmeZJObOeALV 0s4o8eLPHSaQKmaBYywSB/5FgNhsAsYSm5cvYYPYISfR2z2JBcTmFdCSeL1zMtBUDg4WAVWJ /f9EQExRgQiJRTsyISoEJX5MvgdWzSngKTFr0UU2kBJmAT2J+xe1IBbJS2xe85Z5AqPgLCQd sxCqZiGpWsDIvIpRNLU0uaA4KT3XUK84Mbe4NC9dLzk/dxMjJLa/7GBcfMzqEKMAB6MSD++J Y6lhQqyJZcWVuYcYJTiYlUR4W3XTwoR4UxIrq1KL8uOLSnNSiw8xSnOwKInzzt31PkRIID2x JDU7NbUgtQgmy8TBKdXAaP1foFOrxPavdiSXl7fQ5YA+7yh+fSmbW6sPrtCS7hD4NjusOUp4 oXlusfTn1Y5lS17NYc2pWxF+t7rkBNvrlvWTL+6ZPeOxzPY/ldUF6ozzMjaw1q69rtJdaDSr tbL9dh//gp87Nttt3x9wK9Om/4mhirKBGc+GZpmUc9/DY07Zz8nYv69ViaU4I9FQi7moOBEA /PmbYOkCAAA= Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 08.12.2015 03:18, Bartlomiej Zolnierkiewicz wrote: > Fix CPU operating points for Exynos5800 (it use different > voltages than Exynos5420 and supports additional frequencies). > However don't use 2000MHz & 1900MHz OPPs (for A15 cores) and > 1400MHz OPP (for A7 cores) for now as they are not available > on all boards. > > Based on Hardkernel's kernel for ODROID-XU3 board. > > Changes by Ben Gamari: > - Port to operating-points-v2 > > Cc: Kukjin Kim > Cc: Doug Anderson > Cc: Javier Martinez Canillas > Cc: Andreas Faerber > Cc: Sachin Kamat > Cc: Thomas Abraham > Signed-off-by: Ben Gamari > Signed-off-by: Bartlomiej Zolnierkiewicz > --- > arch/arm/boot/dts/exynos5800.dtsi | 165 ++++++++++++++++++++++++++++++++++++++ > 1 file changed, 165 insertions(+) > > diff --git a/arch/arm/boot/dts/exynos5800.dtsi b/arch/arm/boot/dts/exynos5800.dtsi > index c0bb356..e417218 100644 > --- a/arch/arm/boot/dts/exynos5800.dtsi > +++ b/arch/arm/boot/dts/exynos5800.dtsi > @@ -17,8 +17,173 @@ > > / { > compatible = "samsung,exynos5800", "samsung,exynos5"; > + > + cpu0_opp_table: opp_table0 { This includes exynos5420.dtsi, so override by label instead of duplicating full path. In the same time you don't have to duplicate all data - just override what you want: &cpu0_opp_table { opp00@1800000000 { opp-microvolt = <1250000>; }; }; That should be sufficient I think. > + compatible = "operating-points-v2"; > + opp-shared; > + opp00@1800000000 { > + opp-hz = /bits/ 64 <1800000000>; > + opp-microvolt = <1250000>; > + clock-latency-ns = <140000>; > + }; > + opp01@1700000000 { > + opp-hz = /bits/ 64 <1700000000>; > + opp-microvolt = <1250000>; > + clock-latency-ns = <140000>; > + }; > + opp02@1600000000 { > + opp-hz = /bits/ 64 <1600000000>; > + opp-microvolt = <1250000>; > + clock-latency-ns = <140000>; > + }; > + opp03@1500000000 { > + opp-hz = /bits/ 64 <1500000000>; > + opp-microvolt = <1100000>; > + clock-latency-ns = <140000>; > + }; > + opp04@1400000000 { > + opp-hz = /bits/ 64 <1400000000>; > + opp-microvolt = <1100000>; > + clock-latency-ns = <140000>; > + }; > + opp05@1300000000 { > + opp-hz = /bits/ 64 <1300000000>; > + opp-microvolt = <1100000>; > + clock-latency-ns = <140000>; > + }; > + opp06@1200000000 { > + opp-hz = /bits/ 64 <1200000000>; > + opp-microvolt = <1000000>; > + clock-latency-ns = <140000>; > + }; > + opp07@1100000000 { > + opp-hz = /bits/ 64 <1100000000>; > + opp-microvolt = <1000000>; > + clock-latency-ns = <140000>; > + }; > + opp08@1000000000 { > + opp-hz = /bits/ 64 <1000000000>; > + opp-microvolt = <1000000>; > + clock-latency-ns = <140000>; > + }; > + opp09@900000000 { > + opp-hz = /bits/ 64 <900000000>; > + opp-microvolt = <1000000>; > + clock-latency-ns = <140000>; > + }; > + opp10@800000000 { > + opp-hz = /bits/ 64 <800000000>; > + opp-microvolt = <900000>; > + clock-latency-ns = <140000>; > + }; > + opp11@700000000 { > + opp-hz = /bits/ 64 <700000000>; > + opp-microvolt = <900000>; > + clock-latency-ns = <140000>; > + }; > + opp12@600000000 { > + opp-hz = /bits/ 64 <600000000>; > + opp-microvolt = <900000>; > + clock-latency-ns = <140000>; > + }; > + opp13@500000000 { > + opp-hz = /bits/ 64 <500000000>; > + opp-microvolt = <900000>; > + clock-latency-ns = <140000>; > + }; > + opp14@400000000 { > + opp-hz = /bits/ 64 <400000000>; > + opp-microvolt = <900000>; > + clock-latency-ns = <140000>; > + }; > + opp15@300000000 { > + opp-hz = /bits/ 64 <300000000>; > + opp-microvolt = <900000>; > + clock-latency-ns = <140000>; > + }; > + opp16@200000000 { > + opp-hz = /bits/ 64 <200000000>; > + opp-microvolt = <900000>; > + clock-latency-ns = <140000>; > + }; > + }; > + > + cpu1_opp_table: opp_table1 { > + compatible = "operating-points-v2"; > + opp-shared; > + opp00@1300000000 { > + opp-hz = /bits/ 64 <1300000000>; > + opp-microvolt = <1250000>; > + clock-latency-ns = <140000>; > + }; > + opp01@1200000000 { > + opp-hz = /bits/ 64 <1200000000>; > + opp-microvolt = <1250000>; > + clock-latency-ns = <140000>; > + }; > + opp02@1100000000 { > + opp-hz = /bits/ 64 <1100000000>; > + opp-microvolt = <1250000>; > + clock-latency-ns = <140000>; > + }; > + opp03@1000000000 { > + opp-hz = /bits/ 64 <1000000000>; > + opp-microvolt = <1100000>; > + clock-latency-ns = <140000>; > + }; > + opp04@900000000 { > + opp-hz = /bits/ 64 <900000000>; > + opp-microvolt = <1100000>; > + clock-latency-ns = <140000>; > + }; > + opp05@800000000 { > + opp-hz = /bits/ 64 <800000000>; > + opp-microvolt = <1100000>; > + clock-latency-ns = <140000>; > + }; > + opp06@700000000 { > + opp-hz = /bits/ 64 <700000000>; > + opp-microvolt = <1000000>; > + clock-latency-ns = <140000>; > + }; > + opp07@600000000 { > + opp-hz = /bits/ 64 <600000000>; > + opp-microvolt = <1000000>; > + clock-latency-ns = <140000>; > + }; > + opp08@500000000 { > + opp-hz = /bits/ 64 <500000000>; > + opp-microvolt = <1000000>; > + clock-latency-ns = <140000>; > + }; > + opp09@400000000 { > + opp-hz = /bits/ 64 <400000000>; > + opp-microvolt = <1000000>; > + clock-latency-ns = <140000>; > + }; > + opp10@300000000 { > + opp-hz = /bits/ 64 <300000000>; > + opp-microvolt = <900000>; > + clock-latency-ns = <140000>; > + }; > + opp11@200000000 { > + opp-hz = /bits/ 64 <200000000>; > + opp-microvolt = <900000>; > + clock-latency-ns = <140000>; > + }; > + }; > }; > > +&cpu0 { operating-points-v2 = <&cpu0_opp_table>; }; > +&cpu1 { operating-points-v2 = <&cpu0_opp_table>; }; > +&cpu2 { operating-points-v2 = <&cpu0_opp_table>; }; > +&cpu3 { operating-points-v2 = <&cpu0_opp_table>; }; > + > +&cpu4 { operating-points-v2 = <&cpu1_opp_table>; }; > +&cpu5 { operating-points-v2 = <&cpu1_opp_table>; }; > +&cpu6 { operating-points-v2 = <&cpu1_opp_table>; }; > +&cpu7 { operating-points-v2 = <&cpu1_opp_table>; }; > + Why? These are set by exynos5420.dtsi already, aren't they? Best regards, Krzysztof