From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753670AbbLJAji (ORCPT ); Wed, 9 Dec 2015 19:39:38 -0500 Received: from mailout2.w1.samsung.com ([210.118.77.12]:24100 "EHLO mailout2.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751187AbbLJAjf (ORCPT ); Wed, 9 Dec 2015 19:39:35 -0500 X-AuditID: cbfec7f5-f79b16d000005389-46-5668c9c4e912 Subject: Re: [PATCH v2 02/19] PM / devfreq: exynos: Add documentation for generic exynos bus frequency driver To: Chanwoo Choi , myungjoo.ham@samsung.com, kgene@kernel.org References: <1449634091-1842-1-git-send-email-cw00.choi@samsung.com> <1449634091-1842-3-git-send-email-cw00.choi@samsung.com> Cc: kyungmin.park@samsung.com, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, linux@arm.linux.org.uk, tjakobi@math.uni-bielefeld.de, linux.amoon@gmail.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org From: Krzysztof Kozlowski Message-id: <5668C9BE.7050900@samsung.com> Date: Thu, 10 Dec 2015 09:39:26 +0900 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.4.0 MIME-version: 1.0 In-reply-to: <1449634091-1842-3-git-send-email-cw00.choi@samsung.com> Content-type: text/plain; charset=windows-1252 Content-transfer-encoding: 7bit X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprLIsWRmVeSWpSXmKPExsVy+t/xy7pHTmaEGdxtUbS4/uU5q8X8I+dY LfrfLGS1OPdqJaPF6xeGFv2PXzNbnG16w25xedccNovPvUcYLWac38dksW7jLXaL25d5LZZe v8hkcbtxBZvFhOlrWSxa9x5ht2hb/YHVQdBjzbw1jB4tzT1sHpf7epk8ds66y+6xcvkXNo9N qzrZPP4dY/fo27KK0ePzJrkAzigum5TUnMyy1CJ9uwSujB3/mpgLXilV3Py/i72BcZt0FyMn h4SAicSTXY/ZIWwxiQv31rN1MXJxCAksZZQ433SUFcJ5yihxesl1sCphgXyJads+MoPYIgJh ErNn/ACzhQTqJQ6emM0O0sAscJdJ4uL7J2wgCTYBY4nNy5eA2bwCWhI7rnaDDWIRUJWY/20+ UDMHh6hAhMSiHZkQJYISPybfYwGxOQVcJbqWXGUCKWEW0JO4f1ELJMwsIC+xec1b5gmMArOQ dMxCqJqFpGoBI/MqRtHU0uSC4qT0XCO94sTc4tK8dL3k/NxNjJBI+7qDcekxq0OMAhyMSjy8 FU7pYUKsiWXFlbmHGCU4mJVEeKNOZIQJ8aYkVlalFuXHF5XmpBYfYpTmYFES5525632IkEB6 YklqdmpqQWoRTJaJg1OqgbG+g+32Cj3+3TfktiSdXdQ2XWleuE/vr5+v7ud/fiP3zaia8/rP 43JX380zLo+un1v6XDmhL+3GGkbnlNBp29f+WP9w1ssFi598LvotaXlwBh9zNyPr+XsCv/jK LPyzsxSfp7XUNRflTrUwuDXVc5H0nrfmKvlhBhPkfEqiN+78Iq3LvnlFja8SS3FGoqEWc1Fx IgBOZ0fWsAIAAA== Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 09.12.2015 13:07, Chanwoo Choi wrote: > This patch adds the documentation for generic exynos bus frequency > driver. > > Signed-off-by: Chanwoo Choi > --- > .../devicetree/bindings/devfreq/exynos-bus.txt | 94 ++++++++++++++++++++++ > 1 file changed, 94 insertions(+) > create mode 100644 Documentation/devicetree/bindings/devfreq/exynos-bus.txt > > diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt > new file mode 100644 > index 000000000000..54a1f9c46c88 > --- /dev/null > +++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt > @@ -0,0 +1,94 @@ > +* Generic Exynos Bus frequency device > + > +The Samsung Exynos SoC have many buses for data transfer between DRAM > +and sub-blocks in SoC. Almost Exynos SoC have the common architecture > +for buses. Generally, the each bus of Exynos SoC includes the source clock > +and power line and then is able to change the clock according to the usage > +of each buses on runtime. When gathering the usage of each buses on runtime, > +thie driver uses the PPMU (Platform Performance Monitoring Unit) which s/thie/the/ > +is able to measure the current load of sub-blocks. > + > +There are a little different composition among Exynos SoC because each Exynos > +SoC has the different sub-blocks. So, this difference should be specified > +in devicetree file instead of each device driver. In result, this driver > +is able to support the bus frequency for all Exynos SoCs. > + > +Required properties for bus device: > +- compatible: Should be "samsung,exynos-bus". > +- clock-names : the name of clock used by the bus, "bus". > +- clocks : phandles for clock specified in "clock-names" property. > +- #clock-cells: should be 1. This is a clock consumer, right? So the clock-cells is not valid here. > +- operating-points-v2: the OPP table including frequency/voltage information > + to support DVFS (Dynamic Voltage/Frequency Scaling) feature. > +- vdd-supply: the regulator to provide the buses with the voltage. > +- devfreq-events: the devfreq-event device to monitor the curret utilization s/curret/current/ > + of buses. > + > +Optional properties for bus device: > +- exynos,saturation-ratio: the percentage value which is used to calibrate > + the performance count againt total cycle count. s/againt/against/ > + > +Example1: > + Show the AXI buses of Exynos3250 SoC. Exynos3250 divides the buses to > + power line (regulator). The MIF (Memory Interface) AXI bus is used to > + transfer data between DRAM and CPU and uses the VDD_MIF regualtor. > + > + - power line(VDD_MIF) --> bus for DMC (Dynamic Memory Controller) block > + > + - MIF bus's frequency/voltage table > + ----------------------- > + |Lv| Freq | Voltage | > + ----------------------- > + |L1| 50000 |800000 | > + |L2| 100000 |800000 | > + |L3| 134000 |800000 | > + |L4| 200000 |800000 | > + |L5| 400000 |875000 | > + ----------------------- > + > +Example2 : > + The bus of DMC (Dynamic Memory Controller) block in exynos3250.dtsi > + are listed below: s/are/is/ (one bus is listed) > + > + bus_dmc: bus_dmc { > + compatible = "samsung,exynos-bus"; > + clocks = <&cmu_dmc CLK_DIV_DMC>; > + clock-names = "bus"; > + operating-points-v2 = <&bus_dmc_opp_table>; > + status = "disabled"; > + }; > + > + bus_dmc_opp_table: opp_table0 { > + compatible = "operating-points-v2"; > + opp-shared; > + > + opp00 { Maybe use convention with frequency, like: opp@50000000 This also used in opp.txt examples. > + opp-hz = /bits/ 64 <50000000>; > + opp-microvolt = <800000>; > + }; > + opp01 { > + opp-hz = /bits/ 64 <100000000>; > + opp-microvolt = <800000>; > + }; > + opp02 { > + opp-hz = /bits/ 64 <134000000>; > + opp-microvolt = <800000>; > + }; > + opp03 { > + opp-hz = /bits/ 64 <200000000>; > + opp-microvolt = <800000>; > + }; > + opp04 { > + opp-hz = /bits/ 64 <400000000>; > + opp-microvolt = <875000>; > + }; > + }; > + > + Usage case to handle the frequency and voltage of bus on runtime > + in exynos3250-rinato.dts are listed below: s/are/is/ > + > + &bus_dmc { > + devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>; > + vdd-supply = <&buck1_reg>; /* VDD_MIF */ > + status = "okay"; > + }; >