From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751514AbbLJBJT (ORCPT ); Wed, 9 Dec 2015 20:09:19 -0500 Received: from mailout4.samsung.com ([203.254.224.34]:34051 "EHLO mailout4.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751220AbbLJBJN (ORCPT ); Wed, 9 Dec 2015 20:09:13 -0500 MIME-version: 1.0 Content-type: text/plain; charset=UTF-8 X-AuditID: cbfee68d-f79646d000001355-2e-5668d0b62c64 Content-transfer-encoding: 8BIT Message-id: <5668D0B6.1030902@samsung.com> Date: Thu, 10 Dec 2015 10:09:10 +0900 From: Chanwoo Choi User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.6.0 To: Krzysztof Kozlowski , myungjoo.ham@samsung.com, kgene@kernel.org Cc: kyungmin.park@samsung.com, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, linux@arm.linux.org.uk, tjakobi@math.uni-bielefeld.de, linux.amoon@gmail.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v2 03/19] ARM: dts: Add DMC bus node for Exynos3250 References: <1449634091-1842-1-git-send-email-cw00.choi@samsung.com> <1449634091-1842-4-git-send-email-cw00.choi@samsung.com> <5668CADE.8090706@samsung.com> In-reply-to: <5668CADE.8090706@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrIIsWRmVeSWpSXmKPExsWyRsSkUHfbhYwwg1Xf5CzmHznHatH/ZiGr xblXKxktXr8wtOh//JrZ4mzTG3aLy7vmsFl87j3CaDHj/D4mi3Ubb7Fb3L7Ma7H0+kUmi9uN K9gsJkxfy2LRuvcIu0Xb6g+sDgIea+atYfRoae5h87jc18vksXPWXXaPlcu/sHlsWtXJ5vHv GLtH35ZVjB6fN8kFcEZx2aSk5mSWpRbp2yVwZXx4Mp2l4ItIxYON11kaGHcLdDFyckgImEjc +XueHcIWk7hwbz1bFyMXh5DACkaJaw1NLDBFj75tZIdIzGKUmLb7AitIgldAUOLH5HtARRwc zALyEkcuZYOEmQXUJSbNW8QMUf+AUeL2m9XMEPVaEmdXf2QDsVkEVCVmLJ0BtoANKL7/xQ02 kDmiAhES3ScqQcIiAvESm15cBTuIWeAuk8TF90/AeoUF3CWO/TrOBLFgAaPE7LOLwV7gFNCW mPdvGtilEgJbOCR+n/jOCLFNQOLb5ENgl0oIyEpsOsAM8ZmkxMEVN1gmMIrNQvLPLIR/ZiH5 ZwEj8ypG0dSC5ILipPQiQ73ixNzi0rx0veT83E2MwJg//e9Z7w7G2wesDzEKcDAq8fBedEkP E2JNLCuuzD3EaAp0xERmKdHkfGBiySuJNzQ2M7IwNTE1NjK3NFMS51WU+hksJJCeWJKanZpa kFoUX1Sak1p8iJGJg1OqgdH2kY+YpvwvE5mdUm27jqtHtqxaP6P/X6b72oN7p13RLVKdZF+q J5Kv43zybrLWY7anhwx/iiYsNN7QH6S6+vbthkqvCnE+dt+uiAsxRwq7rN74XezUWXqVf/bF Bf6PI3N3HWT6crDxqllD4s596mkZLBtnp3yStp3Z7HV0/d5Mvz9ZrpG+5kosxRmJhlrMRcWJ APq+sez0AgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrHKsWRmVeSWpSXmKPExsVy+t9jQd1tFzLCDNYflrCYf+Qcq0X/m4Ws FuderWS0eP3C0KL/8Wtmi7NNb9gtLu+aw2bxufcIo8WM8/uYLNZtvMVucfsyr8XS6xeZLG43 rmCzmDB9LYtF694j7BZtqz+wOgh4rJm3htGjpbmHzeNyXy+Tx85Zd9k9Vi7/wuaxaVUnm8e/ Y+wefVtWMXp83iQXwBnVwGiTkZqYklqkkJqXnJ+SmZduq+QdHO8cb2pmYKhraGlhrqSQl5ib aqvk4hOg65aZA/SFkkJZYk4pUCggsbhYSd8O04TQEDddC5jGCF3fkCC4HiMDNJCwhjHjw5Pp LAVfRCoebLzO0sC4W6CLkZNDQsBE4tG3jewQtpjEhXvr2boYuTiEBGYxSkzbfYEVJMErICjx Y/I9li5GDg5mAXmJI5eyQcLMAuoSk+YtYoaof8AocfvNamaIei2Js6s/soHYLAKqEjOWzmAB sdmA4vtf3GADmSMqECHRfaISJCwiEC+x6cVVsL3MAneZJC6+fwLWKyzgLnHs13EmiAULGCVm n10MdimngLbEvH/T2CcwAp2JcN8shPtmIblvASPzKkaJ1ILkguKk9FyjvNRyveLE3OLSvHS9 5PzcTYzgtPJMegfj4V3uhxgFOBiVeHgvuKSHCbEmlhVX5h5ilOBgVhLhtTmXESbEm5JYWZVa lB9fVJqTWnyI0RTowYnMUqLJ+cCUl1cSb2hsYmZkaWRuaGFkbK4kzrvvUmSYkEB6Yklqdmpq QWoRTB8TB6dUA2N+9r8FDD86Fqoy2gY5OV4qkXWSYZ1yYfJl1ZV8iX6GeescFr7aJJgns2d9 1qkSEdYV6sVx21olmCYfW9Bd/CdJQ3Hp2XC+ACmme5GhC9fo7BWOU2/iuThXWzEqR7Wiha1E 1+cH+wKOvKc9XuZ7bFr07p3e13nnieK9SCaNxRM2v2M9e9QsRImlOCPRUIu5qDgRADye6ThB AwAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2015년 12월 10일 09:44, Krzysztof Kozlowski wrote: > On 09.12.2015 13:07, Chanwoo Choi wrote: >> This patch adds the DMC (Dynamic Memory Controller) bus node for Exynos3250 SoC. >> The DMC is an AMBA AXI-compliant slave to interface external JEDEC standard >> SDRAM devices. The bus includes the OPP tables and the source clock for DMC >> block. >> >> Following list specifies the detailed relation between the clock and DMC block: >> - The source clock of DMC block : div_dmc >> >> Signed-off-by: Chanwoo Choi >> --- >> arch/arm/boot/dts/exynos3250.dtsi | 34 ++++++++++++++++++++++++++++++++++ >> 1 file changed, 34 insertions(+) >> >> diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi >> index 2f30d632f1cc..7214c5e42150 100644 >> --- a/arch/arm/boot/dts/exynos3250.dtsi >> +++ b/arch/arm/boot/dts/exynos3250.dtsi >> @@ -687,6 +687,40 @@ >> clock-names = "ppmu"; >> status = "disabled"; >> }; >> + >> + bus_dmc: bus_dmc { >> + compatible = "samsung,exynos-bus"; >> + clocks = <&cmu_dmc CLK_DIV_DMC>; >> + clock-names = "bus"; >> + operating-points-v2 = <&bus_dmc_opp_table>; >> + status = "disabled"; >> + }; >> + >> + bus_dmc_opp_table: opp_table1 { > > This is the firsy opp_table, right? So: > s/opp_table1/opp_table0/ Right. It is first opp_table in exynos3250.dtsi. But, I'm considering the OPP table of CPU freqeuncy as opp_table0. So, I have the plan that support the operation-points-v2 for Exynos3250 CPU. > >> + compatible = "operating-points-v2"; >> + opp-shared; >> + >> + opp00 { >> + opp-hz = /bits/ 64 <50000000>; >> + opp-microvolt = <800000>; >> + }; >> + opp01 { >> + opp-hz = /bits/ 64 <100000000>; >> + opp-microvolt = <800000>; >> + }; >> + opp02 { >> + opp-hz = /bits/ 64 <134000000>; >> + opp-microvolt = <800000>; > > Why 134, not 133 MHz? When I used the 133000000, the source clock is changed to 100Mhz instead of 133MHz. I add following test result on exynos3250-rinato board. Case1. When I use the 134 MHz, the source clock is changed to 133MHz : exynos-bus soc:bus_dmc: old_freq(200000000) -> new_freq (134000000) (real: 133333334) Case2. When I use the 133 MHz, the source clock is changed to 100MHz : exynos-bus soc:bus_dmc: old_freq(200000000) -> new_freq (133000000) (real: 100000000) > >> + }; >> + opp03 { >> + opp-hz = /bits/ 64 <200000000>; >> + opp-microvolt = <800000>; > > Shouldn't this be 825 mV, not 800? I think we used previously that value > for our devices. OK. I'll modify it. Regards, Chanwoo Choi