From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752342AbbLJCSF (ORCPT ); Wed, 9 Dec 2015 21:18:05 -0500 Received: from mailout3.samsung.com ([203.254.224.33]:40847 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751199AbbLJCSC (ORCPT ); Wed, 9 Dec 2015 21:18:02 -0500 MIME-version: 1.0 Content-type: text/plain; charset=utf-8 X-AuditID: cbfee690-f79646d000001316-67-5668e0d7d5c6 Content-transfer-encoding: 8BIT Message-id: <5668E0D6.7000200@samsung.com> Date: Thu, 10 Dec 2015 11:17:58 +0900 From: Chanwoo Choi User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.6.0 To: Krzysztof Kozlowski , myungjoo.ham@samsung.com, kgene@kernel.org Cc: kyungmin.park@samsung.com, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, linux@arm.linux.org.uk, tjakobi@math.uni-bielefeld.de, linux.amoon@gmail.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v2 03/19] ARM: dts: Add DMC bus node for Exynos3250 References: <1449634091-1842-1-git-send-email-cw00.choi@samsung.com> <1449634091-1842-4-git-send-email-cw00.choi@samsung.com> <5668CADE.8090706@samsung.com> <5668D0B6.1030902@samsung.com> <5668D34B.1010602@samsung.com> <5668DCDB.8020609@samsung.com> <5668DDBF.2070305@samsung.com> In-reply-to: <5668DDBF.2070305@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrHIsWRmVeSWpSXmKPExsWyRsSkWPf6g4wwg2u9Ahbzj5xjteh/s5DV 4tyrlYwWr18YWvQ/fs1scbbpDbvF5V1z2Cw+9x5htJhxfh+TxbqNt9gtbl/mtVh6/SKTxe3G FWwWE6avZbFo3XuE3aJt9QdWBwGPNfPWMHq0NPeweVzu62Xy2DnrLrvHyuVf2Dw2repk8/h3 jN2jb8sqRo/Pm+QCOKO4bFJSczLLUov07RK4MqbuXcdScE2uYu1KrwbGgxJdjJwcEgImEq0/ GtkgbDGJC/fWA9lcHEICKxgl/u3YxgZT1Lj4MBNEYimjROfN78wgCV4BQYkfk++xdDFycDAL yEscuZQNYapLTJmSC1H+gFHi0NkHLBDlWhKf/mxnBbFZBFQlDh25ABZnA4rvf3GDDaRXVCBC ovtEJUhYRCBeYtOLq2D3MAvcZZK4+P4J2D3CAu4Sx34dh7pnAZPE9jn7wYZyCmhL3L9ykx0k ISGwlkPi9Jyt7BDbBCS+TT4EdqiEgKzEpgPMEI9JShxccYNlAqPYLCTvzEJ4ZxbCOwsYmVcx iqYWJBcUJ6UXmegVJ+YWl+al6yXn525iBEb76X/PJuxgvHfA+hCjAAejEg/vBZf0MCHWxLLi ytxDjKZAN0xklhJNzgemlLySeENjMyMLUxNTYyNzSzMlcd7XUj+DhQTSE0tSs1NTC1KL4otK c1KLDzEycXBKNTDG7aovODflZVZZXjZL5cLTHS8jjXwMa2VDfBY/mFZQwlb/0UVT+JZryt5L y99ta88XY+bQiJ2nFfbh94wdQRlz7/SqzLwa6Hoz56KvoMmMHWed5GR4DQK7DzZsmOJ0KGjn 68vLnV9k2xWrivlYLVl+YPW7ZQu/Jm9ZldTnblowz+eTvXIS+wMlluKMREMt5qLiRAA3Ki+G 8QIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrNKsWRmVeSWpSXmKPExsVy+t9jAd3rDzLCDNZN5rSYf+Qcq0X/m4Ws FuderWS0eP3C0KL/8Wtmi7NNb9gtLu+aw2bxufcIo8WM8/uYLNZtvMVucfsyr8XS6xeZLG43 rmCzmDB9LYtF694j7BZtqz+wOgh4rJm3htGjpbmHzeNyXy+Tx85Zd9k9Vi7/wuaxaVUnm8e/ Y+wefVtWMXp83iQXwBnVwGiTkZqYklqkkJqXnJ+SmZduq+QdHO8cb2pmYKhraGlhrqSQl5ib aqvk4hOg65aZA/SFkkJZYk4pUCggsbhYSd8O04TQEDddC5jGCF3fkCC4HiMDNJCwhjFj6t51 LAXX5CrWrvRqYDwo0cXIySEhYCLRuPgwE4QtJnHh3nq2LkYuDiGBpYwSnTe/M4MkeAUEJX5M vsfSxcjBwSwgL3HkUjaEqS4xZUouRPkDRolDZx+wQJRrSXz6s50VxGYRUJU4dOQCWJwNKL7/ xQ02kF5RgQiJ7hOVIGERgXiJTS+ugq1lFrjLJHHx/RM2kISwgLvEsV/HmSAWLGCS2D5nP9hQ TgFtiftXbrJPYBSYheS8WQjnzUI4bwEj8ypGidSC5ILipPRco7zUcr3ixNzi0rx0veT83E2M 4ITyTHoH4+Fd7ocYBTgYlXh4L7ikhwmxJpYVV+YeYpTgYFYS4XW8nxEmxJuSWFmVWpQfX1Sa k1p8iNEU6L+JzFKiyfnAZJdXEm9obGJmZGlkbmhhZGyuJM6771JkmJBAemJJanZqakFqEUwf EwenVAMj250vt9Ifft3oaW+5vvjmlhiulSsL73tVT//hJbFP5s+h3RFB9k316snRUnFRiyt9 b2RX+K5XereuZd4E26/cyvtvXHo4J/9T2Qt+04A1Gwy3L5883Vlt7fpGrnVut4QnZZpX2V/n mNXGIpd1Kr6q6tDGnzOD/lo9OPbimdTltbnKd4ulfZfmKbEUZyQaajEXFScCAIBl6Ug+AwAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2015년 12월 10일 11:04, Krzysztof Kozlowski wrote: > On 10.12.2015 11:00, Chanwoo Choi wrote: >> On 2015년 12월 10일 10:20, Krzysztof Kozlowski wrote: >>> On 10.12.2015 10:09, Chanwoo Choi wrote: >>>> On 2015년 12월 10일 09:44, Krzysztof Kozlowski wrote: >>>>> On 09.12.2015 13:07, Chanwoo Choi wrote: >>>>>> This patch adds the DMC (Dynamic Memory Controller) bus node for Exynos3250 SoC. >>>>>> The DMC is an AMBA AXI-compliant slave to interface external JEDEC standard >>>>>> SDRAM devices. The bus includes the OPP tables and the source clock for DMC >>>>>> block. >>>>>> >>>>>> Following list specifies the detailed relation between the clock and DMC block: >>>>>> - The source clock of DMC block : div_dmc >>>>>> >>>>>> Signed-off-by: Chanwoo Choi >>>>>> --- >>>>>> arch/arm/boot/dts/exynos3250.dtsi | 34 ++++++++++++++++++++++++++++++++++ >>>>>> 1 file changed, 34 insertions(+) >>>>>> >>>>>> diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi >>>>>> index 2f30d632f1cc..7214c5e42150 100644 >>>>>> --- a/arch/arm/boot/dts/exynos3250.dtsi >>>>>> +++ b/arch/arm/boot/dts/exynos3250.dtsi >>>>>> @@ -687,6 +687,40 @@ >>>>>> clock-names = "ppmu"; >>>>>> status = "disabled"; >>>>>> }; >>>>>> + >>>>>> + bus_dmc: bus_dmc { >>>>>> + compatible = "samsung,exynos-bus"; >>>>>> + clocks = <&cmu_dmc CLK_DIV_DMC>; >>>>>> + clock-names = "bus"; >>>>>> + operating-points-v2 = <&bus_dmc_opp_table>; >>>>>> + status = "disabled"; >>>>>> + }; >>>>>> + >>>>>> + bus_dmc_opp_table: opp_table1 { >>>>> >>>>> This is the firsy opp_table, right? So: >>>>> s/opp_table1/opp_table0/ >>>> >>>> Right. It is first opp_table in exynos3250.dtsi. >>>> But, I'm considering the OPP table of CPU freqeuncy as opp_table0. >>>> So, I have the plan that support the operation-points-v2 for Exynos3250 CPU. >>> >>> Ok >>> >>>> >>>>> >>>>>> + compatible = "operating-points-v2"; >>>>>> + opp-shared; >>>>>> + >>>>>> + opp00 { >>>>>> + opp-hz = /bits/ 64 <50000000>; >>>>>> + opp-microvolt = <800000>; >>>>>> + }; >>>>>> + opp01 { >>>>>> + opp-hz = /bits/ 64 <100000000>; >>>>>> + opp-microvolt = <800000>; >>>>>> + }; >>>>>> + opp02 { >>>>>> + opp-hz = /bits/ 64 <134000000>; >>>>>> + opp-microvolt = <800000>; >>>>> >>>>> Why 134, not 133 MHz? >>>> >>>> When I used the 133000000, the source clock is changed to 100Mhz instead of 133MHz. >>>> I add following test result on exynos3250-rinato board. >>>> >>>> Case1. >>>> When I use the 134 MHz, the source clock is changed to 133MHz >>>> : exynos-bus soc:bus_dmc: old_freq(200000000) -> new_freq (134000000) (real: 133333334) >>>> >>>> Case2. >>>> When I use the 133 MHz, the source clock is changed to 100MHz >>>> : exynos-bus soc:bus_dmc: old_freq(200000000) -> new_freq (133000000) (real: 100000000) >>> >>> Now I remember that issue. You could use here directly 133333334 but >>> that also would look a little bit weird... so 134 is ok for me. Could >>> just add a comment that desired frequency is actually "133 MHz"? >> >> Do you prefer among following example? >> >> Example1. >> opp02 { >> /* The desired frequency is 133MHz because >> * clock change has the dependency on clock driver. >> * When set rate as 134MHz, the clock driver would >> * change the 133MHz actually instead of 134MHz. >> */ >> opp-hz = /bits/ 64 <134000000>; >> opp-microvolt = <800000>; >> }; >> >> Example2. >> opp02 { >> opp-hz = /bits/ 64 <133333334>; >> opp-microvolt = <800000>; >> }; > > I would prefer the second one (133333334) but I don't have strong > feelings about it. If you ok, I want to maintain the original approach as following: opp02 { opp-hz = /bits/ 64 <134000000>; opp-microvolt = <800000>; }; Best Regards, Chanwoo Choi