From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752422AbbLJCbH (ORCPT ); Wed, 9 Dec 2015 21:31:07 -0500 Received: from mailout2.samsung.com ([203.254.224.25]:54778 "EHLO mailout2.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751875AbbLJCaY (ORCPT ); Wed, 9 Dec 2015 21:30:24 -0500 MIME-version: 1.0 Content-type: text/plain; charset=UTF-8 X-AuditID: cbfee68f-f793a6d000001364-8c-5668e3bd7575 Content-transfer-encoding: 8BIT Message-id: <5668E3BC.7020901@samsung.com> Date: Thu, 10 Dec 2015 11:30:20 +0900 From: Chanwoo Choi User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.6.0 To: Krzysztof Kozlowski , myungjoo.ham@samsung.com, kgene@kernel.org Cc: kyungmin.park@samsung.com, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, linux@arm.linux.org.uk, tjakobi@math.uni-bielefeld.de, linux.amoon@gmail.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v2 12/19] ARM: dts: Add bus nodes using VDD_INT for Exynos3250 References: <1449634091-1842-1-git-send-email-cw00.choi@samsung.com> <1449634091-1842-13-git-send-email-cw00.choi@samsung.com> <5668DED7.3020403@samsung.com> In-reply-to: <5668DED7.3020403@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrPIsWRmVeSWpSXmKPExsWyRsSkQHfv44wwg7XzOC3mHznHatH/ZiGr xblXKxktXr8wtOh//JrZ4mzTG3aLy7vmsFl87j3CaDHj/D4mi3Ubb7Fb3L7Ma7H0+kUmi9uN K9gsJkxfy2LRuvcIu0Xb6g+sDgIea+atYfRoae5h87jc18vksXPWXXaPlcu/sHlsWtXJ5vHv GLtH35ZVjB6fN8kFcEZx2aSk5mSWpRbp2yVwZeyfcpO54IVixd0nvewNjBOluhg5OSQETCRO TLzMDmGLSVy4t54NxBYSWMEoceNyMExNw9H1zF2MXEDxpYwSk3btZwJJ8AoISvyYfI+li5GD g1lAXuLIpWyQMLOAusSkeYug6h8wSszau4QZol5L4mfXZDCbRUBV4tSaFrBlbEDx/S9usIHM ERWIkOg+UQkSFhGIl9j04iobyBxmgbtMEhffPwGrFxYIkVi67gsLxIKFjBIHFiwFO4JTQFui d3IYSFxCYAuHxNbvVxkhlglIfJt8CKxGQkBWYtMBZojHJCUOrrjBMoFRbBaSd2YhvDMLyTsL GJlXMYqmFiQXFCelFxnrFSfmFpfmpesl5+duYgTG++l/z/p3MN49YH2IUYCDUYmH94JLepgQ a2JZcWXuIUZToCMmMkuJJucDk0peSbyhsZmRhamJqbGRuaWZkjjvQqmfwUIC6YklqdmpqQWp RfFFpTmpxYcYmTg4pRoYQ18e0/eLs4p5eWrTgz83t0V1PD0V/uq/6TUD6e89lzQfHlFayBns 9pM7hCtOq/MP567tps8+hDcyKhRY8bqqh25L0Ty5tv5kW/03Sde960Rcg5I3LBAxEZHcG9Y0 lfmT+YnKvzJ/tHWXNlZYXdjE/CahdcX1hdZKuyfNXTXx2p0dXq+Kk/d7KLEUZyQaajEXFScC AMdTkyfyAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrLKsWRmVeSWpSXmKPExsVy+t9jAd29jzPCDNa/YrSYf+Qcq0X/m4Ws FuderWS0eP3C0KL/8Wtmi7NNb9gtLu+aw2bxufcIo8WM8/uYLNZtvMVucfsyr8XS6xeZLG43 rmCzmDB9LYtF694j7BZtqz+wOgh4rJm3htGjpbmHzeNyXy+Tx85Zd9k9Vi7/wuaxaVUnm8e/ Y+wefVtWMXp83iQXwBnVwGiTkZqYklqkkJqXnJ+SmZduq+QdHO8cb2pmYKhraGlhrqSQl5ib aqvk4hOg65aZA/SFkkJZYk4pUCggsbhYSd8O04TQEDddC5jGCF3fkCC4HiMDNJCwhjFj/5Sb zAUvFCvuPullb2CcKNXFyMkhIWAi0XB0PTOELSZx4d56ti5GLg4hgaWMEpN27WcCSfAKCEr8 mHyPpYuRg4NZQF7iyKVskDCzgLrEpHmLmCHqHzBKzNq7hBmiXkviZ9dkMJtFQFXi1JoWNhCb DSi+/8UNNpA5ogIREt0nKkHCIgLxEpteXAXbyyxwl0ni4vsnYPXCAiESS9d9YYFYsJBR4sCC pWBHcApoS/RODpvAKDALyXmzEM6bheS8BYzMqxglUguSC4qT0nMN81LL9YoTc4tL89L1kvNz NzGCk8ozqR2MB3e5H2IU4GBU4uG94JIeJsSaWFZcmXuIUYKDWUmE1w2YkoR4UxIrq1KL8uOL SnNSiw8xmgL9N5FZSjQ5H5jw8kriDY1NzIwsjcwNLYyMzZXEeWsvRYYJCaQnlqRmp6YWpBbB 9DFxcEo1MAYp3suxPKbV02ay0Nduzc3MFfmMQf23577+bK/e2enJM3OX/EyHSyfCbp2o+uz0 9a/QQokDL510VxXNuma8cM3G8PcrVkrxP7r0effRMM9Ck9SXZcHbtLhe5//o1SxcFzJxpdcF +R0Wsb7feKtzTTy9PfTKf0XZHbRZtWbWLJ6IuL+N/bu2XVdiKc5INNRiLipOBADDZ+exQAMA AA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2015년 12월 10일 11:09, Krzysztof Kozlowski wrote: > On 09.12.2015 13:08, Chanwoo Choi wrote: >> This patch adds the bus nodes using VDD_INT for Exynos3250 SoC. >> Exynos3250 has following AXI buses to translate data between >> DRAM and sub-blocks. >> >> Following list specifies the detailed relation between DRAM and sub-blocks: >> - ACLK400 clock for MCUISP >> - ACLK266 clock for ISP >> - ACLK200 clock for FSYS >> - ACLK160 clock for LCD0 >> - ACLK100 clock for PERIL >> - GDL clock for LEFTBUS >> - GDR clock for RIGHTBUS >> - SCLK_MFC clock for MFC >> >> Signed-off-by: Chanwoo Choi >> --- >> arch/arm/boot/dts/exynos3250.dtsi | 160 ++++++++++++++++++++++++++++++++++++++ >> 1 file changed, 160 insertions(+) >> >> diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi >> index 7214c5e42150..46dee1951ec1 100644 >> --- a/arch/arm/boot/dts/exynos3250.dtsi >> +++ b/arch/arm/boot/dts/exynos3250.dtsi >> @@ -721,6 +721,166 @@ >> opp-microvolt = <875000>; >> }; >> }; >> + >> + bus_leftbus: bus_leftbus { >> + compatible = "samsung,exynos-bus"; >> + clocks = <&cmu CLK_DIV_GDL>; >> + clock-names = "bus"; >> + operating-points-v2 = <&bus_leftbus_opp_table>; >> + status = "disabled"; >> + }; >> + >> + bus_rightbus: bus_rightbus { >> + compatible = "samsung,exynos-bus"; >> + clocks = <&cmu CLK_DIV_GDR>; >> + clock-names = "bus"; >> + operating-points-v2 = <&bus_leftbus_opp_table>; >> + status = "disabled"; >> + }; >> + >> + bus_lcd0: bus_lcd0 { >> + compatible = "samsung,exynos-bus"; >> + clocks = <&cmu CLK_DIV_ACLK_160>; >> + clock-names = "bus"; >> + operating-points-v2 = <&bus_leftbus_opp_table>; >> + status = "disabled"; >> + }; >> + >> + bus_fsys: bus_fsys { >> + compatible = "samsung,exynos-bus"; >> + clocks = <&cmu CLK_DIV_ACLK_200>; >> + clock-names = "bus"; >> + operating-points-v2 = <&bus_leftbus_opp_table>; >> + status = "disabled"; >> + }; >> + >> + bus_mcuisp: bus_mcuisp { >> + compatible = "samsung,exynos-bus"; >> + clocks = <&cmu CLK_DIV_ACLK_400_MCUISP>; >> + clock-names = "bus"; >> + operating-points-v2 = <&bus_mcuisp_opp_table>; >> + status = "disabled"; >> + }; >> + >> + bus_isp: bus_isp { >> + compatible = "samsung,exynos-bus"; >> + clocks = <&cmu CLK_DIV_ACLK_266>; >> + clock-names = "bus"; >> + operating-points-v2 = <&bus_isp_opp_table>; >> + status = "disabled"; >> + }; >> + >> + bus_peril: bus_peril { >> + compatible = "samsung,exynos-bus"; >> + clocks = <&cmu CLK_DIV_ACLK_100>; >> + clock-names = "bus"; >> + operating-points-v2 = <&bus_peril_opp_table>; >> + status = "disabled"; >> + }; >> + >> + bus_mfc: bus_mfc { >> + compatible = "samsung,exynos-bus"; >> + clocks = <&cmu CLK_SCLK_MFC>; >> + clock-names = "bus"; >> + operating-points-v2 = <&bus_leftbus_opp_table>; >> + status = "disabled"; >> + }; >> + >> + bus_leftbus_opp_table: opp_table2 { >> + compatible = "operating-points-v2"; >> + opp-shared; >> + >> + opp00 { >> + opp-hz = /bits/ 64 <50000000>; >> + opp-microvolt = <900000>; >> + }; >> + opp01 { >> + opp-hz = /bits/ 64 <80000000>; >> + opp-microvolt = <900000>; >> + }; >> + opp02 { >> + opp-hz = /bits/ 64 <100000000>; >> + opp-microvolt = <1000000>; >> + }; >> + opp03 { >> + opp-hz = /bits/ 64 <134000000>; >> + opp-microvolt = <1000000>; >> + }; >> + opp04 { >> + opp-hz = /bits/ 64 <200000000>; >> + opp-microvolt = <1000000>; >> + }; >> + }; >> + >> + bus_mcuisp_opp_table: opp_table3 { >> + compatible = "operating-points-v2"; >> + opp-shared; >> + >> + opp00 { >> + opp-hz = /bits/ 64 <50000000>; >> + opp-microvolt = <900000>; > > The voltages for all these INT-block tables have exactly the same value > which of course makes sense because this is the same regulator. However > the opp-microvolt property is an optional property. Do you have to > provide it in each OPP? I couldn't check whether opp-microvolt property is optional or not. You're right. Except for the opp-microvolt property of parent device, I'll remove it on dts file. Best Regards, Chanwoo Choi