From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753010AbbLKHB5 (ORCPT ); Fri, 11 Dec 2015 02:01:57 -0500 Received: from mailout4.w1.samsung.com ([210.118.77.14]:19425 "EHLO mailout4.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750940AbbLKHBz (ORCPT ); Fri, 11 Dec 2015 02:01:55 -0500 X-AuditID: cbfec7f4-f79026d00000418a-6b-566a74e01fb0 Subject: Re: [PATCH v3 14/20] ARM: dts: Add bus nodes using VDD_MIF for Exynos4x12 To: Chanwoo Choi , myungjoo.ham@samsung.com, kgene@kernel.org References: <1449810479-14763-1-git-send-email-cw00.choi@samsung.com> <1449810479-14763-15-git-send-email-cw00.choi@samsung.com> Cc: kyungmin.park@samsung.com, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, linux@arm.linux.org.uk, tjakobi@math.uni-bielefeld.de, linux.amoon@gmail.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org From: Krzysztof Kozlowski Message-id: <566A74D8.6010209@samsung.com> Date: Fri, 11 Dec 2015 16:01:44 +0900 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.4.0 MIME-version: 1.0 In-reply-to: <1449810479-14763-15-git-send-email-cw00.choi@samsung.com> Content-type: text/plain; charset=windows-1252 Content-transfer-encoding: 7bit X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprHIsWRmVeSWpSXmKPExsVy+t/xK7oPSrLCDLbNVLC4/uU5q8X8I+dY LfrfLGS1OPdqJaPF6xeGFv2PXzNbnG16w25xedccNovPvUcYLWac38dksW7jLXaL25d5LZZe v8hkcbtxBZvFhOlrWSxa9x5ht2hb/YHVQdBjzbw1jB4tzT1sHpf7epk8ds66y+6xcvkXNo9N qzrZPP4dY/fo27KK0ePzJrkAzigum5TUnMyy1CJ9uwSujCWPr7EXvBWpeLnnD1sDY59AFyMn h4SAicT8J3/ZIWwxiQv31rN1MXJxCAksZZS4M6UPyvnFKLHqwUVWkCphgRCJx80TGEFsEYEw idkzfjBDFDUxSsxet4gdxGEWuMskcfH9EzaQKjYBY4nNy5eA2bwCWhI9jzeA2SwCqhLX/vwF msrBISoQIbFoRyZEiaDEj8n3WEBsTgF3idUf5oOVMAvoSdy/qAUSZhaQl9i85i3zBEaBWUg6 ZiFUzUJStYCReRWjaGppckFxUnquoV5xYm5xaV66XnJ+7iZGSKx92cG4+JjVIUYBDkYlHt6F HFlhQqyJZcWVuYcYJTiYlUR4+VOBQrwpiZVVqUX58UWlOanFhxilOViUxHnn7nofIiSQnliS mp2aWpBaBJNl4uCUamB02F68Q9SmUm3zXL2dJtZld5RlL9+oqf5f/fjh3UaZwJZi03l9O5c9 S0xYnbx0/6R1bGd19zXw+wosfJkfv3ev9fFvLwW+z15QlsKRHMOUY802de6GP+tK3H/lJ9T5 5E1Lf9db/7pF7Qv/S04TQ9s6LqHqgABu4WO1nw+4/3XqNVgf9Kzj8QclluKMREMt5qLiRABS JVsssQIAAA== Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 11.12.2015 14:07, Chanwoo Choi wrote: > This patch adds the bus noes using VDD_MIF for Exynos4x12 SoC. "noes", pointed at v2. > Exynos4x12 has the following AXI buses to translate data > between DRAM and DMC/ACP/C2C. > > Signed-off-by: Chanwoo Choi > [linux.amoon: Tested on Odroid U3] > Tested-by: Anand Moon > --- > arch/arm/boot/dts/exynos4x12.dtsi | 68 +++++++++++++++++++++++++++++++++++++++ > 1 file changed, 68 insertions(+) The code itself: Reviewed-by: Krzysztof Kozlowski Best regards, Krzysztof > diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi > index 84a23f962946..99a0f4ca3d47 100644 > --- a/arch/arm/boot/dts/exynos4x12.dtsi > +++ b/arch/arm/boot/dts/exynos4x12.dtsi > @@ -281,6 +281,74 @@ > clocks = <&clock CLK_SMMU_LITE1>, <&clock CLK_FIMC_LITE1>; > #iommu-cells = <0>; > }; > + > + bus_dmc: bus_dmc { > + compatible = "samsung,exynos-bus"; > + clocks = <&clock CLK_DIV_DMC>; > + clock-names = "bus"; > + operating-points-v2 = <&bus_dmc_opp_table>; > + status = "disabled"; > + }; > + > + bus_acp: bus_acp { > + compatible = "samsung,exynos-bus"; > + clocks = <&clock CLK_DIV_ACP>; > + clock-names = "bus"; > + operating-points-v2 = <&bus_acp_opp_table>; > + status = "disabled"; > + }; > + > + bus_c2c: bus_c2c { > + compatible = "samsung,exynos-bus"; > + clocks = <&clock CLK_DIV_C2C>; > + clock-names = "bus"; > + operating-points-v2 = <&bus_dmc_opp_table>; > + status = "disabled"; > + }; > + > + bus_dmc_opp_table: opp_table1 { > + compatible = "operating-points-v2"; > + opp-shared; > + > + opp@100000000 { > + opp-hz = /bits/ 64 <100000000>; > + opp-microvolt = <900000>; > + }; > + opp@134000000 { > + opp-hz = /bits/ 64 <134000000>; > + opp-microvolt = <900000>; > + }; > + opp@160000000 { > + opp-hz = /bits/ 64 <160000000>; > + opp-microvolt = <900000>; > + }; > + opp@267000000 { > + opp-hz = /bits/ 64 <267000000>; > + opp-microvolt = <950000>; > + }; > + opp@400000000 { > + opp-hz = /bits/ 64 <400000000>; > + opp-microvolt = <1050000>; > + }; > + }; > + > + bus_acp_opp_table: opp_table2 { > + compatible = "operating-points-v2"; > + opp-shared; > + > + opp@100000000 { > + opp-hz = /bits/ 64 <100000000>; > + }; > + opp@134000000 { > + opp-hz = /bits/ 64 <134000000>; > + }; > + opp@160000000 { > + opp-hz = /bits/ 64 <160000000>; > + }; > + opp@267000000 { > + opp-hz = /bits/ 64 <267000000>; > + }; > + }; > }; > > &combiner { >