Re: [RFC PATCH v3 4/8] arm64: Handle early CPU boot failures

Mark Rutland
2015-12-16T11:36:33Z

On Wed, Dec 16, 2015 at 11:29:15AM +0000, Will Deacon wrote:
> On Wed, Dec 16, 2015 at 10:39:50AM +0000, Suzuki K. Poulose wrote:
> > On 15/12/15 11:55, Will Deacon wrote:
> > >On Wed, Dec 09, 2015 at 09:57:15AM +0000, Suzuki K. Poulose wrote:
> >
> > >> /*
> > >> * Initial data for bringing up a secondary CPU.
> > >>+ * @stack - sp for the secondary CPU
> > >>+ * @status - Result passed back from the secondary CPU to
> > >>+ * indicate failure.
> > >> */
> > >> struct secondary_data {
> > >> void *stack;
> > >>-};
> > >>+ unsigned long status;
> > >>+} ____cacheline_aligned;
> > >
> > >Why is this necessary?
> >
> > That was based on a suggestion from Mark Rutland here:
> >
> > https://lkml.org/lkml/2015/12/1/580
>
> That thread is talking about the CWG, which is not the same thing as
> ____cacheline_aligned. Given that the architectural maximum for the CWG
> is 2K, we can probably get away with allocating the status field amongst
> the head.S text instead (which we know will be clean).
>
> Since SMP boot is serialised, that should be sufficient, right?

Assuming you mean in .head.text (rather than .text), that should work
given that we don't currently free .head.text.

Mark.