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Date: Fri, 18 Dec 2015 10:40:19 +0000
From: Marc Zyngier <marc.zyngier@arm.com>
Organization: ARM Ltd
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To: Linus Walleij <linus.walleij@linaro.org>,
        Thomas Gleixner <tglx@linutronix.de>,
        Jason Cooper <jason@lakedaemon.net>, Arnd Bergmann <arnd@arndb.de>
CC: linux-kernel@vger.kernel.org
Subject: Re: [PATCH] irqchip: gic: Kconfig the number of instances
References: <1450431893-7867-1-git-send-email-linus.walleij@linaro.org>
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On 18/12/15 09:44, Linus Walleij wrote:
> There is currently a hack in the GIC driver making it possible
> to pass the number of GIC instances from the platform-specific
> include files and thus override the variable MAX_GIC_NR.
> 
> With multiplatform deployments, this will not work as we need
> to get rid of the platform-specific include files.
> 
> It turns out that this feature is only used by the RealView
> platform which has a cascaded GIC. So move the configuration
> to Kconfig and bump to 2 instances if we're building for the
> RealView. The include file hacks can then be removed.
> 
> Tested on the ARM PB11MPCore with its cascaded GIC.
> 
> Suggested-by: Arnd Bergmann <arnd@arndb.de>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Excellent, thanks Linus. I've taken the liberty of performing a small
change as outlined below:

> ---
>  drivers/irqchip/Kconfig   |  5 +++++
>  drivers/irqchip/irq-gic.c | 24 ++++++++++--------------
>  2 files changed, 15 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
> index 4d7294e5d982..bf29a8b2b7c5 100644
> --- a/drivers/irqchip/Kconfig
> +++ b/drivers/irqchip/Kconfig
> @@ -8,6 +8,11 @@ config ARM_GIC
>  	select IRQ_DOMAIN_HIERARCHY
>  	select MULTI_IRQ_HANDLER
>  
> +config ARM_GIC_MAX_NR
> +	int
> +	default 2 if ARCH_REALVIEW
> +	default 1
> +
>  config ARM_GIC_V2M
>  	bool
>  	depends on ARM_GIC
> diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
> index abf2ffaed392..006a83838857 100644
> --- a/drivers/irqchip/irq-gic.c
> +++ b/drivers/irqchip/irq-gic.c
> @@ -99,11 +99,7 @@ static u8 gic_cpu_map[NR_GIC_CPU_IF] __read_mostly;
>  
>  static struct static_key supports_deactivate = STATIC_KEY_INIT_TRUE;
>  
> -#ifndef MAX_GIC_NR
> -#define MAX_GIC_NR	1
> -#endif
> -
> -static struct gic_chip_data gic_data[MAX_GIC_NR] __read_mostly;
> +static struct gic_chip_data gic_data[CONFIG_ARM_GIC_MAX_NR] __read_mostly;
>  
>  #ifdef CONFIG_GIC_NON_BANKED
>  static void __iomem *gic_get_percpu_base(union gic_base *base)
> @@ -417,7 +413,7 @@ static struct irq_chip gic_eoimode1_chip = {
>  
>  void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq)
>  {
> -	if (gic_nr >= MAX_GIC_NR)
> +	if (gic_nr >= CONFIG_ARM_GIC_MAX_NR)
>  		BUG();

I have replaced these statements with:

	BUG_ON(gic_nr >= CONFIG_ARM_GIC_MAX_NR);

which have the same effect, and are vaguely nicer.

I've pushed it on my irq/gic-4.5 branch.

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...