From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933008AbcAKN17 (ORCPT ); Mon, 11 Jan 2016 08:27:59 -0500 Received: from mail-pa0-f67.google.com ([209.85.220.67]:36333 "EHLO mail-pa0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758182AbcAKN1z (ORCPT ); Mon, 11 Jan 2016 08:27:55 -0500 Subject: Re: [PATCH v3 2/3] soc: rockchip: power-domain: Modify power domain driver for rk3368 To: zhangqing References: <1452508600-3512-1-git-send-email-zhangqing@rock-chips.com> <1452508600-3512-3-git-send-email-zhangqing@rock-chips.com> Cc: heiko@sntech.de, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, khilman@linaro.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, huangtao@rock-chips.com, zyw@rock-chips.com, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org From: Caesar Wang Message-ID: <5693ADD1.4000207@gmail.com> Date: Mon, 11 Jan 2016 21:27:45 +0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.4.0 MIME-Version: 1.0 In-Reply-To: <1452508600-3512-3-git-send-email-zhangqing@rock-chips.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi zhangqin, From my datasheet "Rockchip RK3368 TRM V2.0.pdf" Maybe i'm missing something. 在 2016年01月11日 18:36, zhangqing 写道: > This driver is modified to support RK3368 SoC. > > Signed-off-by: zhangqing > --- > drivers/soc/rockchip/pm_domains.c | 33 +++++++++++++++++++++++++++++++++ > 1 file changed, 33 insertions(+) > > diff --git a/drivers/soc/rockchip/pm_domains.c b/drivers/soc/rockchip/pm_domains.c > index 534c589..6cdffb1 100644 > --- a/drivers/soc/rockchip/pm_domains.c > +++ b/drivers/soc/rockchip/pm_domains.c > @@ -18,6 +18,7 @@ > #include > #include > #include > +#include > > struct rockchip_domain_info { > int pwr_mask; > @@ -75,6 +76,9 @@ struct rockchip_pmu { > #define DOMAIN_RK3288(pwr, status, req) \ > DOMAIN(pwr, status, req, req, (req) + 16) > > +#define DOMAIN_RK3368(pwr, status, req) \ > + DOMAIN(pwr, status, req, (req) + 16, req) > + You should remove it, that's seem same with the rk3288. The rk3368 datasheet: PMU_PMU_BUS_IDLE_ST ----->idle_vio[24]----->ack PMU_PMU_BUS_IDLE_REQ ---->idle_req_vio[8]----->idle > static bool rockchip_pmu_domain_is_idle(struct rockchip_pm_domain *pd) > { > struct rockchip_pmu *pmu = pd->pmu; > @@ -444,6 +448,14 @@ static const struct rockchip_domain_info rk3288_pm_domains[] = { > [RK3288_PD_GPU] = DOMAIN_RK3288(9, 9, 2), > }; > > +static const struct rockchip_domain_info rk3368_pm_domains[] = { > + [RK3368_PD_PERI] = DOMAIN_RK3368(13, 12, 6), > + [RK3368_PD_VIO] = DOMAIN_RK3368(15, 14, 8), > + [RK3368_PD_VIDEO] = DOMAIN_RK3368(14, 13, 7), > + [RK3368_PD_GPU_0] = DOMAIN_RK3368(16, 15, 2), > + [RK3368_PD_GPU_1] = DOMAIN_RK3368(17, 16, 2), > +}; > + > static const struct rockchip_pmu_info rk3288_pmu = { > .pwr_offset = 0x08, > .status_offset = 0x0c, > @@ -461,11 +473,32 @@ static const struct rockchip_pmu_info rk3288_pmu = { > .domain_info = rk3288_pm_domains, > }; > > +static const struct rockchip_pmu_info rk3368_pmu = { > + .pwr_offset = 0x0c, > + .status_offset = 0x10, > + .req_offset = 0x3c, > + .idle_offset = 0x40, > + .ack_offset = 0x40, > + > + .core_pwrcnt_offset = 0x48, > + .gpu_pwrcnt_offset = 0x50, > + > + .core_power_transition_time = 24, > + .gpu_power_transition_time = 24, > + > + .num_domains = ARRAY_SIZE(rk3368_pm_domains), > + .domain_info = rk3368_pm_domains, > +}; > + > static const struct of_device_id rockchip_pm_domain_dt_match[] = { > { > .compatible = "rockchip,rk3288-power-controller", > .data = (void *)&rk3288_pmu, > }, > + { > + .compatible = "rockchip,rk3368-power-controller", > + .data = (void *)&rk3368_pmu, > + }, > { /* sentinel */ }, > }; > > > -- > Thanks, > Caesar