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Subject: Re: [RFC 09/13] x86/mm: Disable interrupts when flushing the TLB
 using CR3
To: Andy Lutomirski <luto@amacapital.net>,
        Linus Torvalds <torvalds@linux-foundation.org>
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Cc: Oleg Nesterov <oleg@redhat.com>, X86 ML <x86@kernel.org>,
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From: Dave Hansen <dave.hansen@linux.intel.com>
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Date: Wed, 13 Jan 2016 15:43:37 -0800
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On 01/13/2016 03:35 PM, Andy Lutomirski wrote:
> Can anyone here ask a hardware or microcode person what's going on
> with CR3 writes possibly being faster than INVPCID?  Is there some
> trick to it?

I just went and measured it myself this morning.  "INVPCID Type 3" (all
contexts no global) on a Skylake system was 15% slower than a CR3 write.

Is that in the same ballpark from what you've observed?