From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751598AbcBUSOA (ORCPT ); Sun, 21 Feb 2016 13:14:00 -0500 Received: from mail-wm0-f48.google.com ([74.125.82.48]:38706 "EHLO mail-wm0-f48.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751160AbcBUSN6 (ORCPT ); Sun, 21 Feb 2016 13:13:58 -0500 Subject: Re: [PATCH] ARM: OMAP2+: Fix onenand initialization to avoid filesystem corruption To: Tony Lindgren , Aaro Koskinen References: <1454683028-4193-1-git-send-email-ivo.g.dimitrov.75@gmail.com> <20160208193644.GU19432@atomide.com> <20160210211226.GB1640@darkstar.musicnaut.iki.fi> <20160211001220.GM19432@atomide.com> Cc: rogerq@ti.com, khilman@deeprootsystems.com, linux@arm.linux.org.uk, pali.rohar@gmail.com, sre@kernel.org, pavel@ucw.cz, nm@ti.com, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org From: Ivaylo Dimitrov Message-ID: <56C9FE63.3070602@gmail.com> Date: Sun, 21 Feb 2016 20:13:55 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.5.1 MIME-Version: 1.0 In-Reply-To: <20160211001220.GM19432@atomide.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On 11.02.2016 02:12, Tony Lindgren wrote: > > Also.. There's a chance somebody has created a onenand file system > with recent mainline kernels that did the reset and disabled ECC. > So with Ivaylo's patch fixing that, those may not mount properly > any longer. Most likely people just keep their maemo rootfs there > though with the MMC being available. I guess this is possible, but what worries me more is that the longer the patch is not pushed, the higher the chance somebody to end-up with broken rootfs. Wouldn't it be better to push it, thus preventing that happening? BTW the differences for N9/50 come from ONENAND_SYS_CFG1_HF bit and ONENAND_SYS_CFG1_BRL_6 vs ONENAND_SYS_CFG1_BRL_4. Both are changed (later in the code) anyway, so I guess it is safe to reset them to default values. Or, maybe the correct fix is to issue RESET command to onenand controller after GPMC reset? RESET command is supposed to put all the bits to their default values. Ivo.