From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752634AbcB2Wb3 (ORCPT ); Mon, 29 Feb 2016 17:31:29 -0500 Received: from comal.ext.ti.com ([198.47.26.152]:35501 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752206AbcB2WbZ (ORCPT ); Mon, 29 Feb 2016 17:31:25 -0500 From: "Franklin S Cooper Jr." To: Tony Lindgren CC: , , , , , , , , Subject: Re: [PATCH v3 1/5] pwms: pwm-ti*: Remove support for local clock gating References: <1456439796-28546-1-git-send-email-fcooper@ti.com> <1456439796-28546-2-git-send-email-fcooper@ti.com> <20160229220444.GQ13417@atomide.com> Message-ID: <56D4C69D.1090100@ti.com> Date: Mon, 29 Feb 2016 16:30:53 -0600 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.5.1 MIME-Version: 1.0 In-Reply-To: <20160229220444.GQ13417@atomide.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Tony, On 02/29/2016 04:04 PM, Tony Lindgren wrote: > * Franklin S Cooper Jr [160225 14:37]: >> The PWMSS local clock gating registers have no real purpose on OMAP ARM >> devices. These registers were left over registers from DSP IP where the >> PRCM doesn't exist. There is a silicon bug where gating and ungating clocks >> don't function properly. TRMs will be update to indicate that these >> registers shouldn't be touched. >> >> Therefore, all code that accesses the PWMSS_CLKCONFIG or PWMSS_CLKSTATUS >> will be removed by this patch with zero loss of functionality by the ECAP >> and EPWM drivers. >> @@ -243,40 +240,15 @@ static int ecap_pwm_probe(struct platform_device *pdev) >> } >> >> pm_runtime_enable(&pdev->dev); >> - pm_runtime_get_sync(&pdev->dev); >> - >> - status = pwmss_submodule_state_change(pdev->dev.parent, >> - PWMSS_ECAPCLK_EN); >> - if (!(status & PWMSS_ECAPCLK_EN_ACK)) { >> - dev_err(&pdev->dev, "PWMSS config space clock enable failed\n"); >> - ret = -EINVAL; >> - goto pwmss_clk_failure; >> - } >> - >> - pm_runtime_put_sync(&pdev->dev); >> >> platform_set_drvdata(pdev, pc); >> return 0; >> - >> -pwmss_clk_failure: >> - pm_runtime_put_sync(&pdev->dev); >> - pm_runtime_disable(&pdev->dev); >> - pwmchip_remove(&pc->chip); >> - return ret; >> } > Hmm but why are you also removing the pm_runtime calls? Those > actually do take care of gating the clocks via the interconnect > level code that is hwmod in this case. I removed all PM runtime calls that revolved around pwmss_submodule_state_change. Originally the driver would do a pm_runtime_get_sync then call pwmss_submodule_state_change and then immediately call pm_runtime_put_sync. Without pwmss_submodule_state_change those calls would be meaningless. I also removed pm_runtime calls in error paths that no longer existed. Within ecap and epwm driver pm_runtime_get is done when pwm_enable is called and pm_runtime_sync calls are done when pwm_disable is called. Similar pm_runtime_get and pm_runtime_sync calls are done in functions that ended up touching register's within the IP. > > Regards, > > Tony