From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754532AbcCCUKo (ORCPT ); Thu, 3 Mar 2016 15:10:44 -0500 Received: from mail-pa0-f66.google.com ([209.85.220.66]:35552 "EHLO mail-pa0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750874AbcCCUKm (ORCPT ); Thu, 3 Mar 2016 15:10:42 -0500 Subject: Re: [PATCH v2 1/2] bmips: add BCM6358 support To: =?UTF-8?Q?=c3=81lvaro_Fern=c3=a1ndez_Rojas?= , linux-mips@linux-mips.org, ralf@linux-mips.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, jogo@openwrt.org, cernekee@gmail.com References: <1456054881-26787-1-git-send-email-noltari@gmail.com> From: Florian Fainelli Message-ID: <56D899EB.5050700@gmail.com> Date: Thu, 3 Mar 2016 12:09:15 -0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.5.1 MIME-Version: 1.0 In-Reply-To: <1456054881-26787-1-git-send-email-noltari@gmail.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 21/02/16 03:41, Álvaro Fernández Rojas wrote: > BCM6358 has a shared TLB which conflicts with current SMP support, so it must > be disabled for now. > BCM6358 uses >= 0xfffe0000 addresses for internal registers, which need to be > remapped (by using a simplified version of BRCM63xx ioremap.h). > > Signed-off-by: Álvaro Fernández Rojas > --- > v2: Use a different approach for remapping internal registers > > arch/mips/bmips/setup.c | 29 +++++++++++++++++------ > arch/mips/include/asm/mach-bmips/ioremap.h | 37 ++++++++++++++++++++++++++++++ > 2 files changed, 59 insertions(+), 7 deletions(-) > create mode 100644 arch/mips/include/asm/mach-bmips/ioremap.h > > diff --git a/arch/mips/bmips/setup.c b/arch/mips/bmips/setup.c > index 3553528..f834a86 100644 > --- a/arch/mips/bmips/setup.c > +++ b/arch/mips/bmips/setup.c > @@ -18,6 +18,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -35,9 +36,12 @@ > > static const unsigned long kbase = VMLINUX_LOAD_ADDRESS & 0xfff00000; > > +phys_addr_t bmips_internal_registers; > + > struct bmips_quirk { > - const char *compatible; > - void (*quirk_fn)(void); > + const char *compatible; > + void (*quirk_fn)(void); > + const phys_addr_t regs; > }; That does not scale very well to having some sort of generic quirk function here. > > static void kbase_setup(void) > @@ -95,17 +99,27 @@ static void bcm6328_quirks(void) > bcm63xx_fixup_cpu1(); > } > > +static void bcm6358_quirks(void) > +{ > + /* > + * BCM6358 needs special handling for its shared TLB, so > + * disable SMP for now > + */ > + bmips_smp_enabled = 0; > +} > + > static void bcm6368_quirks(void) > { > bcm63xx_fixup_cpu1(); > } > > static const struct bmips_quirk bmips_quirk_list[] = { > - { "brcm,bcm3384-viper", &bcm3384_viper_quirks }, > - { "brcm,bcm33843-viper", &bcm3384_viper_quirks }, > - { "brcm,bcm6328", &bcm6328_quirks }, > - { "brcm,bcm6368", &bcm6368_quirks }, > - { "brcm,bcm63168", &bcm6368_quirks }, > + { "brcm,bcm3384-viper", &bcm3384_viper_quirks, 0 }, > + { "brcm,bcm33843-viper", &bcm3384_viper_quirks, 0 }, > + { "brcm,bcm6328", &bcm6328_quirks, 0 }, > + { "brcm,bcm6358", &bcm6358_quirks, 0xfffe0000 }, > + { "brcm,bcm6368", &bcm6368_quirks, 0 }, > + { "brcm,bcm63168", &bcm6368_quirks, 0 }, > { }, > }; > > @@ -162,6 +176,7 @@ void __init plat_mem_setup(void) > for (q = bmips_quirk_list; q->quirk_fn; q++) { > if (of_flat_dt_is_compatible(of_get_flat_dt_root(), > q->compatible)) { > + bmips_internal_registers = q->regs; > q->quirk_fn(); > } > } > diff --git a/arch/mips/include/asm/mach-bmips/ioremap.h b/arch/mips/include/asm/mach-bmips/ioremap.h > new file mode 100644 > index 0000000..5ffca94 > --- /dev/null > +++ b/arch/mips/include/asm/mach-bmips/ioremap.h > @@ -0,0 +1,37 @@ > +#ifndef __ASM_MACH_BMIPS_IOREMAP_H > +#define __ASM_MACH_BMIPS_IOREMAP_H > + > +#include > + > +extern phys_addr_t bmips_internal_registers; > + > +static inline phys_addr_t fixup_bigphys_addr(phys_addr_t phys_addr, > + phys_addr_t size) > +{ > + return phys_addr; > +} > + > +static inline int is_bmips_internal_registers(phys_addr_t offset) > +{ > + if (bmips_internal_registers != 0 && offset >= bmips_internal_registers) > + return 1; Humm, we should probably just use a hardcoded constant here, and just pick one which works for all SoCs, so the 3368 base address for instance: 0xfff8_0000 seems like a good candidate, and also works for other DSL SoCs too. -- Florian