Re: [PATCH 2/3] net: hns: add Hisilicon RoCE support

["Yankejian (Hackim Yim)" <yankejian@huawei.com>]

On 2016/3/12 18:43, Leon Romanovsky wrote:
> On Fri, Mar 11, 2016 at 06:37:10PM +0800, Lijun Ou wrote:
>> It added hns_dsaf_roce_reset routine for roce driver.
>> RoCE is a feature of hns.
>> In hip06 SOC, in roce reset process, it's needed to configure
>> dsaf channel reset,port and sl map info.
>>
>> Signed-off-by: Lijun Ou <oulijun@huawei.com>
>> Signed-off-by: Wei Hu(Xavier) <xavier.huwei@huawei.com>
>> Signed-off-by: Lisheng <lisheng011@huawei.com>
>> ---
>>  drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c | 84 ++++++++++++++++++++++
>>  drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h | 14 ++++
>>  drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c | 62 +++++++++++++---
>>  drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h  | 13 ++++
>>  4 files changed, 163 insertions(+), 10 deletions(-)
>>
>> diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
>> index 38fc5be..a0f0d4f 100644
>> --- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
>> +++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c
>> @@ -12,6 +12,7 @@
>>  #include <linux/init.h>
>>  #include <linux/interrupt.h>
>>  #include <linux/netdevice.h>
>> +#include <linux/of_platform.h>
>>  #include <linux/platform_device.h>
>>  #include <linux/of.h>
>>  #include <linux/of_address.h>
>> @@ -2593,6 +2594,89 @@ static struct platform_driver g_dsaf_driver = {
>>  
>>  module_platform_driver(g_dsaf_driver);
>>  
>> +/**
>> + * hns_dsaf_roce_reset - reset dsaf and roce
>> + * @dsaf_fwnode: Pointer to framework node for the dasf
>> + * @val: 0 - request reset , 1 - drop reset
>> + * retuen 0 - success , negative --fail
>> + */
>> +int hns_dsaf_roce_reset(struct fwnode_handle *dsaf_fwnode, u32 val)
>> +{
>> +	struct dsaf_device *dsaf_dev;
>> +	struct platform_device *pdev;
>> +	unsigned int mp;
>> +	unsigned int sl;
>> +	unsigned int credit;
>> +	int i;
>> +	const u32 port_map[DSAF_ROCE_CREDIT_CHN][DSAF_ROCE_CHAN_MODE] = {
>> +		{0, 0, 0},
>> +		{1, 0, 0},
>> +		{2, 1, 0},
>> +		{3, 1, 0},
>> +		{4, 2, 1},
>> +		{4, 2, 1},
>> +		{5, 3, 1},
>> +		{5, 3, 1},
>> +	};
>> +	const u32 sl_map[DSAF_ROCE_CREDIT_CHN][DSAF_ROCE_CHAN_MODE] = {
>> +		{0, 0, 0},
>> +		{0, 1, 1},
>> +		{0, 0, 2},
>> +		{0, 1, 3},
>> +		{0, 0, 0},
>> +		{1, 1, 1},
>> +		{0, 0, 2},
>> +		{1, 1, 3},
>> +	};
> Do you have a plan to send a version with enums/defines for this
> numbers? Especially for _CHAN_MODE.
>
> .

Hi leon,

    it seems the enums is added in hns_dsaf_main.h, as belows:

diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h
index 5fea226..c917b9a 100644
--- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h
+++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h
@@ -40,6 +40,16 @@ struct hns_mac_cb;
 #define DSAF_DUMP_REGS_NUM 504
 #define DSAF_STATIC_NUM 28
 
+#define DSAF_ROCE_CREDIT_CHN 8
+#define DSAF_ROCE_CHAN_MODE 3
+
+enum dsaf_roce_port_port_mode {
+	DSAF_ROCE_6PORT_MODE,
+	DSAF_ROCE_4PORT_MODE,
+	DSAF_ROCE_2PORT_MODE,
+	DSAF_ROCE_CHAN_MODE_NUM
+};
+

MBR, Kejian