[PATCH 05/10] ARM: dts: Add exynos3250-artik5 dtsi file for ARTIK5 module

Chanwoo Choi
2016-03-14T02:04:51Z

This patch adds the support for Device Tree source for Samsung ARTIK5 module[1]
based on Exynos3250 SoC. The ARTIK5 module includes the follwoing devices:
- Application Processor (Samsung Exynos3250)
- WiFi/BT Combo chip (Broadcom4354)
- PMIC (Samsung S2MPS14)
- eMMC (4GB)
- DRAM LPDDR3 (512MB)
- Connectors pin (60 Pins x 3 set)

Also, this patch adds the ARTIK5 development board[2] dts file which includes
the ARTIK5 module[1] and have the devices such as sound codec, sd card port,
ethernet port, uart port and so on.

[1] https://www.artik.io/hardware/artik-5
[2] http://www.digikey.com/product-search/en?FV=ffecca14

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/exynos3250-artik5-devel.dts | 26 +++
arch/arm/boot/dts/exynos3250-artik5.dtsi | 282 ++++++++++++++++++++++++++
3 files changed, 309 insertions(+)
create mode 100644 arch/arm/boot/dts/exynos3250-artik5-devel.dts
create mode 100644 arch/arm/boot/dts/exynos3250-artik5.dtsi

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index a4a6d70e8b26..f2de160828e8 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -108,6 +108,7 @@ dtb-$(CONFIG_ARCH_DIGICOLOR) += \
dtb-$(CONFIG_ARCH_EFM32) += \
efm32gg-dk3750.dtb
dtb-$(CONFIG_ARCH_EXYNOS3) += \
+ exynos3250-artik5-devel.dtb \
exynos3250-monk.dtb \
exynos3250-rinato.dtb
dtb-$(CONFIG_ARCH_EXYNOS4) += \
diff --git a/arch/arm/boot/dts/exynos3250-artik5-devel.dts b/arch/arm/boot/dts/exynos3250-artik5-devel.dts
new file mode 100644
index 000000000000..d17c28969118
--- /dev/null
+++ b/arch/arm/boot/dts/exynos3250-artik5-devel.dts
@@ -0,0 +1,26 @@
+/*
+ * Samsung's Exynos3250 based ARTIK5 development board device tree source
+ *
+ * Copyright (c) 2016 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Device tree source file for Samsung's ARTIK5 development board
+ * which is based on Samsung Exynos3250 SoC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+#include "exynos3250-artik5.dtsi"
+
+/ {
+ model = "Samsung ARTIK5 development board";
+ compatible = "samsung,artik5-devel", "samsung,artik5",
+ "samsung,exynos3250", "samsung,exynos3";
+};
+
+&serial_2 {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/exynos3250-artik5.dtsi b/arch/arm/boot/dts/exynos3250-artik5.dtsi
new file mode 100644
index 000000000000..97d0087efb9f
--- /dev/null
+++ b/arch/arm/boot/dts/exynos3250-artik5.dtsi
@@ -0,0 +1,282 @@
+/*
+ * Samsung's Exynos3250 based ARTIK5 module device tree source
+ *
+ * Copyright (c) 2016 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Device tree source file for Samsung's ARTIK5 module which is based on
+ * Samsung Exynos3250 SoC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "exynos3250.dtsi"
+#include <dt-bindings/clock/samsung,s2mps11.h>
+
+/ {
+ compatible = "samsung,artik5", "samsung,exynos3250", "samsung,exynos3";
+
+
+ chosen {
+ linux,stdout = &serial_2;
+ };
+
+ memory {
+ reg = <0x40000000 0x1ff00000>;
+ };
+
+ firmware@0205F000 {
+ compatible = "samsung,secure-firmware";
+ reg = <0x0205F000 0x1000>;
+ };
+};
+
+&i2c_0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ samsung,i2c-sda-delay = <100>;
+ samsung,i2c-slave-addr = <0x10>;
+ samsung,i2c-max-bus-freq = <100000>;
+ status = "okay";
+
+ s2mps14_pmic@66 {
+ compatible = "samsung,s2mps14-pmic";
+ interrupt-parent = <&gpx3>;
+ interrupts = <5 0>;
+ reg = <0x66>;
+ wakeup;
+
+ s2mps14_osc: clocks {
+ compatible = "samsung,s2mps14-clk";
+ #clock-cells = <1>;
+ clock-output-names = "s2mps14_ap", "unused",
+ "s2mps14_bt";
+ };
+
+ regulators {
+ ldo1_reg: LDO1 {
+ /* VDD_ALIVE15x */
+ regulator-name = "VLDO1_1.0V";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ };
+
+ ldo2_reg: LDO2 {
+ /* VDDQM176 ~ VDDQM185 */
+ regulator-name = "VLDO2_1.2V";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-always-on;
+ };
+
+ ldo3_reg: LDO3 {
+ /*
+ * VDD1_E106 ~ VDD1_E111
+ * DVDD_RTC_AP, DVDD_MMC2_AP
+ */
+ regulator-name = "VLDO3_1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ ldo4_reg: LDO4 {
+ /* AVDD_PLL1120 ~ AVDD_PLL11201 */
+ regulator-name = "VLDO4_1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ ldo5_reg: LDO5 {
+ /* VDDI_PLL_ISO141 ~ VDDI_PLL_ISO142 */
+ regulator-name = "VLDO5_1.0V";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ };
+
+ ldo6_reg: LDO6 {
+ /* VDD_USB, VDD10_HSIC */
+ regulator-name = "VLDO6_1.0V";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ };
+
+ ldo7_reg: LDO7 {
+ /*
+ * VDD18P, AVDD18_TS, AVDD18_HSIC, AVDD_PLL2,
+ * AVDD_ADC, AVDD_ABB_0, M4S_VDD18
+ */
+ regulator-name = "VLDO7_1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ ldo8_reg: LDO8 {
+ /* AVDD33_UOTG */
+ regulator-name = "VLDO8_3.0V";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-always-on;
+ };
+
+ ldo9_reg: LDO9 {
+ /* VDDQ_E86 ~ VDDQ_E105*/
+ regulator-name = "VLDO_1.2V";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-always-on;
+ };
+
+ ldo10_reg: LDO10 {
+ regulator-name = "VLDO10_1.0V";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ };
+
+ ldo11_reg: LDO11 {
+ /* VDD_MMC */
+ regulator-name = "VLDO11_1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ ldo12_reg: LDO12 {
+ /* VDD72 ~ VDD73 */
+ regulator-name = "VLDO12_2.8V";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-always-on;
+ };
+
+ ldo13_reg: LDO13 {
+ regulator-name = "VLDO13_2.8V";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ };
+
+ ldo14_reg: LDO14 {
+ regulator-name = "VLDO14_2.7V";
+ regulator-min-microvolt = <2700000>;
+ regulator-max-microvolt = <2700000>;
+ };
+
+ ldo15_reg: LDO15 {
+ regulator-name = "VLDO_3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ ldo16_reg: LDO16 {
+ regulator-name = "VLDO16_3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ ldo17_reg: LDO17 {
+ regulator-name = "VLDO17_3.0V";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ };
+
+ ldo18_reg: LDO18 {
+ /* DVDD_MMC2_AP */
+ regulator-name = "VLDO18_2.8V";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ };
+
+ ldo19_reg: LDO19 {
+ regulator-name = "VLDO19_1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ ldo20_reg: LDO20 {
+ regulator-name = "VLDO20_1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ ldo21_reg: LDO21 {
+ regulator-name = "VLDO21_1.25V";
+ regulator-min-microvolt = <1250000>;
+ regulator-max-microvolt = <1250000>;
+ };
+
+ ldo22_reg: LDO22 {
+ regulator-name = "VLDO22_1.2V";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ };
+
+ ldo23_reg: LDO23 {
+ /* Xi2c3_SDA/SCL, Xi2c7_SDA/SCL, WLAN_SDIO */
+ regulator-name = "VLDO23_1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ ldo24_reg: LDO24 {
+ regulator-name = "VLDO24_3.0V";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ };
+
+ ldo25_reg: LDO25 {
+ regulator-name = "VLDO25_3.0V";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ };
+
+ buck1_reg: BUCK1 {
+ /* VDD_MIF */
+ regulator-name = "VBUCK1_1.0V";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ };
+
+ buck2_reg: BUCK2 {
+ /* VDD_CPU */
+ regulator-name = "VBUCK2_1.2V";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-always-on;
+ };
+
+ buck3_reg: BUCK3 {
+ /* VDD_G3D */
+ regulator-name = "VBUCK3_1.0V";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ };
+
+ buck4_reg: BUCK4 {
+ regulator-name = "VBUCK4_1.95V";
+ regulator-min-microvolt = <1950000>;
+ regulator-max-microvolt = <1950000>;
+ regulator-always-on;
+ };
+
+ buck5_reg: BUCK5 {
+ regulator-name = "VBUCK5_1.35V";
+ regulator-min-microvolt = <1350000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-always-on;
+ };
+ };
+ };
+};
+
+&xusbxti {
+ clock-frequency = <24000000>;
+};
--
1.9.1