From: "Suzuki K. Poulose" <Suzuki.Poulose@arm.com>
To: Mathieu Poirier <mathieu.poirier@linaro.org>,
linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Subject: Re: [PATCH 01/14] coresight: tmc: modifying naming convention
Date: Wed, 23 Mar 2016 10:38:24 +0000 [thread overview]
Message-ID: <56F27220.4070006@arm.com> (raw)
In-Reply-To: <1458678202-3447-2-git-send-email-mathieu.poirier@linaro.org>
On 22/03/16 20:23, Mathieu Poirier wrote:
> According to the TMC architectural state machine, the 'stopped'
> state is reached when bit 2 (TMCReady) of the TMC Status register
> turns to '1'. The code is correct but the naming convention isn't.
>
> The 'Triggered' bit occupies position '1' of the TMC Status register
> and has nothing to do with the indication of the TMC entering the
> stopped state. As such renaming function "tmc_wait_for_triggered()"
> and changing the #define to reflect what the code is really doing.
>
> This patch has no effect other than clarifying the semantic.
>
> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
> - tmc_wait_for_ready(drvdata);
> + tmc_wait_for_tmcready(drvdata);
Thanks for cleaning this up. The code was indeed confusing.
Suzuki
next prev parent reply other threads:[~2016-03-23 10:38 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-22 20:23 [PATCH 00/14] coresight: tmc: make driver usable by Perf Mathieu Poirier
2016-03-22 20:23 ` [PATCH 01/14] coresight: tmc: modifying naming convention Mathieu Poirier
2016-03-23 10:38 ` Suzuki K. Poulose [this message]
2016-03-22 20:23 ` [PATCH 02/14] coresight: tmc: waiting for TMCReady bit before programming Mathieu Poirier
2016-03-22 20:23 ` [PATCH 03/14] coresight: tmc: re-implementing tmc_read_prepare/unprepare() functions Mathieu Poirier
2016-03-23 10:37 ` Suzuki K. Poulose
2016-03-24 16:38 ` Mathieu Poirier
2016-03-24 19:15 ` Mathieu Poirier
2016-03-22 20:23 ` [PATCH 04/14] coresight: tmc: introducing new header file Mathieu Poirier
2016-03-22 20:23 ` [PATCH 05/14] coresight: tmc: splitting driver in ETB/ETF and ETR components Mathieu Poirier
2016-03-22 20:23 ` [PATCH 06/14] coresight: tmc: making prepare/unprepare functions generic Mathieu Poirier
2016-04-07 15:43 ` Suzuki K Poulose
2016-03-22 20:23 ` [PATCH 07/14] coresight: tmc: making disable function reusable Mathieu Poirier
2016-03-22 20:23 ` [PATCH 08/14] coresight: tmc: allocating memory when needed Mathieu Poirier
2016-04-07 16:50 ` Suzuki K Poulose
2016-04-08 15:23 ` Mathieu Poirier
2016-03-22 20:23 ` [PATCH 09/14] coresight: tmc: adding mode of operation for link/sinks Mathieu Poirier
2016-04-07 17:19 ` Suzuki K Poulose
2016-03-22 20:23 ` [PATCH 10/14] coresight: tmc: make sysFS and Perf mode mutually exclusive Mathieu Poirier
2016-03-22 20:23 ` [PATCH 11/14] coresight: tmc: keep track of memory width Mathieu Poirier
2016-03-22 20:23 ` [PATCH 12/14] coresight: tmc: implementing TMC-ETF AUX space API Mathieu Poirier
2016-03-22 20:23 ` [PATCH 13/14] coresight: tmc: implementing TMC-ETR " Mathieu Poirier
2016-03-22 20:23 ` [PATCH 14/14] coresight: configuring ETF in FIFO mode when acting as link Mathieu Poirier
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