From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753158AbcCaGaY (ORCPT ); Thu, 31 Mar 2016 02:30:24 -0400 Received: from arroyo.ext.ti.com ([192.94.94.40]:41369 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751731AbcCaGaW (ORCPT ); Thu, 31 Mar 2016 02:30:22 -0400 Subject: Re: [PATCH v2] ARM: dts: dra7: Correct clock tree for sys_32k_ck To: Tony Lindgren , Keerthy References: <1457957001-720-1-git-send-email-j-keerthy@ti.com> <20160330211828.GE9329@atomide.com> <20160330213224.GH9329@atomide.com> CC: , , , , , , , Lokesh Vutla From: Tero Kristo Message-ID: <56FCC3FF.7080901@ti.com> Date: Thu, 31 Mar 2016 09:30:23 +0300 User-Agent: Mozilla/5.0 (X11; Linux i686; rv:38.0) Gecko/20100101 Thunderbird/38.6.0 MIME-Version: 1.0 In-Reply-To: <20160330213224.GH9329@atomide.com> Content-Type: text/plain; charset="windows-1252"; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 03/31/2016 12:32 AM, Tony Lindgren wrote: > * Tony Lindgren [160330 14:19]: >> * Keerthy [160314 05:04]: >>> This is w.r.t J6/J6eco: 32clk is pseudo (erratum i856) - clock source. >>> Errata i856 for the AM572x (DRA7xx) points out that the 32.768KHz external >>> crystal is not enabled at power up. Instead the CPU falls back to using >>> an emulation for the 32KHz clock which is SYSCLK1/610. SYSCLK1 is usually >>> 20MHz on boards so far (which gives an emulated frequency of 32.786KHz) >> >> Thanks applying into omap-for-v4.6/fixes. > > Actually let's wait a review from Tero on this one, not sure > about the pseudo clock naming here. So dropping for now. The patch is fine for me, I didn't comment anything before as I thought you already applied it. Acked-by: Tero Kristo > > Regards, > > Tony >