From: Suzuki K Poulose <Suzuki.Poulose@arm.com>
To: Mathieu Poirier <mathieu.poirier@linaro.org>,
linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Subject: Re: [PATCH 09/14] coresight: tmc: adding mode of operation for link/sinks
Date: Thu, 7 Apr 2016 18:19:10 +0100 [thread overview]
Message-ID: <5706968E.1050409@arm.com> (raw)
In-Reply-To: <1458678202-3447-10-git-send-email-mathieu.poirier@linaro.org>
On 22/03/16 20:23, Mathieu Poirier wrote:
> Moving tmc_drvdata::enable to a local_t mode. That way the
> sink interface is aware of it's orgin and the foundation for
> mutual exclusion between the sysFS and Perf interface can be
> laid out.
>
> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
> static int tmc_enable_etf_sink(struct coresight_device *csdev, u32 mode)
> {
> + u32 val;
> bool allocated = false;
> char *buf = NULL;
> unsigned long flags;
> @@ -125,6 +126,15 @@ static int tmc_enable_etf_sink(struct coresight_device *csdev, u32 mode)
> return -EBUSY;
> }
>
> + val = local_cmpxchg(&drvdata->mode, CS_MODE_DISABLED, mode);
Since we don't support PERF mode yet, should we check that before setting the mode ?
>
> static int tmc_enable_etr_sink(struct coresight_device *csdev, u32 mode)
> {
> + u32 val;
> bool allocated = false;
> unsigned long flags;
> void __iomem *vaddr;
> @@ -107,6 +108,15 @@ static int tmc_enable_etr_sink(struct coresight_device *csdev, u32 mode)
> return -EBUSY;
> }
>
> + val = local_cmpxchg(&drvdata->mode, CS_MODE_DISABLED, mode);
> + /*
> + * In sysFS mode we can have multiple writers per sink. Since this
> + * sink is already enabled no memory is needed and the HW need not be
> + * touched.
> + */
> + if (val == CS_MODE_SYSFS)
> + goto out;
> +
Should we make sure 'mode' is not PERF ? Since we assume that the mode is
could be SYSFS in disable below ?
> diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h
> index 6b11caf77ad1..6dbd70861b17 100644
> --- a/drivers/hwtracing/coresight/coresight-tmc.h
> +++ b/drivers/hwtracing/coresight/coresight-tmc.h
> @@ -18,6 +18,7 @@
> #ifndef _CORESIGHT_TMC_H
> #define _CORESIGHT_TMC_H
>
> +#include <linux/io.h>
Why ?
Suzuki
next prev parent reply other threads:[~2016-04-07 17:19 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-22 20:23 [PATCH 00/14] coresight: tmc: make driver usable by Perf Mathieu Poirier
2016-03-22 20:23 ` [PATCH 01/14] coresight: tmc: modifying naming convention Mathieu Poirier
2016-03-23 10:38 ` Suzuki K. Poulose
2016-03-22 20:23 ` [PATCH 02/14] coresight: tmc: waiting for TMCReady bit before programming Mathieu Poirier
2016-03-22 20:23 ` [PATCH 03/14] coresight: tmc: re-implementing tmc_read_prepare/unprepare() functions Mathieu Poirier
2016-03-23 10:37 ` Suzuki K. Poulose
2016-03-24 16:38 ` Mathieu Poirier
2016-03-24 19:15 ` Mathieu Poirier
2016-03-22 20:23 ` [PATCH 04/14] coresight: tmc: introducing new header file Mathieu Poirier
2016-03-22 20:23 ` [PATCH 05/14] coresight: tmc: splitting driver in ETB/ETF and ETR components Mathieu Poirier
2016-03-22 20:23 ` [PATCH 06/14] coresight: tmc: making prepare/unprepare functions generic Mathieu Poirier
2016-04-07 15:43 ` Suzuki K Poulose
2016-03-22 20:23 ` [PATCH 07/14] coresight: tmc: making disable function reusable Mathieu Poirier
2016-03-22 20:23 ` [PATCH 08/14] coresight: tmc: allocating memory when needed Mathieu Poirier
2016-04-07 16:50 ` Suzuki K Poulose
2016-04-08 15:23 ` Mathieu Poirier
2016-03-22 20:23 ` [PATCH 09/14] coresight: tmc: adding mode of operation for link/sinks Mathieu Poirier
2016-04-07 17:19 ` Suzuki K Poulose [this message]
2016-03-22 20:23 ` [PATCH 10/14] coresight: tmc: make sysFS and Perf mode mutually exclusive Mathieu Poirier
2016-03-22 20:23 ` [PATCH 11/14] coresight: tmc: keep track of memory width Mathieu Poirier
2016-03-22 20:23 ` [PATCH 12/14] coresight: tmc: implementing TMC-ETF AUX space API Mathieu Poirier
2016-03-22 20:23 ` [PATCH 13/14] coresight: tmc: implementing TMC-ETR " Mathieu Poirier
2016-03-22 20:23 ` [PATCH 14/14] coresight: configuring ETF in FIFO mode when acting as link Mathieu Poirier
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