From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757039AbcDGRTQ (ORCPT ); Thu, 7 Apr 2016 13:19:16 -0400 Received: from foss.arm.com ([217.140.101.70]:35633 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756960AbcDGRTO (ORCPT ); Thu, 7 Apr 2016 13:19:14 -0400 Subject: Re: [PATCH 09/14] coresight: tmc: adding mode of operation for link/sinks To: Mathieu Poirier , linux-arm-kernel@lists.infradead.org References: <1458678202-3447-1-git-send-email-mathieu.poirier@linaro.org> <1458678202-3447-10-git-send-email-mathieu.poirier@linaro.org> Cc: linux-kernel@vger.kernel.org From: Suzuki K Poulose Message-ID: <5706968E.1050409@arm.com> Date: Thu, 7 Apr 2016 18:19:10 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.2.0 MIME-Version: 1.0 In-Reply-To: <1458678202-3447-10-git-send-email-mathieu.poirier@linaro.org> Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 22/03/16 20:23, Mathieu Poirier wrote: > Moving tmc_drvdata::enable to a local_t mode. That way the > sink interface is aware of it's orgin and the foundation for > mutual exclusion between the sysFS and Perf interface can be > laid out. > > Signed-off-by: Mathieu Poirier > static int tmc_enable_etf_sink(struct coresight_device *csdev, u32 mode) > { > + u32 val; > bool allocated = false; > char *buf = NULL; > unsigned long flags; > @@ -125,6 +126,15 @@ static int tmc_enable_etf_sink(struct coresight_device *csdev, u32 mode) > return -EBUSY; > } > > + val = local_cmpxchg(&drvdata->mode, CS_MODE_DISABLED, mode); Since we don't support PERF mode yet, should we check that before setting the mode ? > > static int tmc_enable_etr_sink(struct coresight_device *csdev, u32 mode) > { > + u32 val; > bool allocated = false; > unsigned long flags; > void __iomem *vaddr; > @@ -107,6 +108,15 @@ static int tmc_enable_etr_sink(struct coresight_device *csdev, u32 mode) > return -EBUSY; > } > > + val = local_cmpxchg(&drvdata->mode, CS_MODE_DISABLED, mode); > + /* > + * In sysFS mode we can have multiple writers per sink. Since this > + * sink is already enabled no memory is needed and the HW need not be > + * touched. > + */ > + if (val == CS_MODE_SYSFS) > + goto out; > + Should we make sure 'mode' is not PERF ? Since we assume that the mode is could be SYSFS in disable below ? > diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h > index 6b11caf77ad1..6dbd70861b17 100644 > --- a/drivers/hwtracing/coresight/coresight-tmc.h > +++ b/drivers/hwtracing/coresight/coresight-tmc.h > @@ -18,6 +18,7 @@ > #ifndef _CORESIGHT_TMC_H > #define _CORESIGHT_TMC_H > > +#include Why ? Suzuki