From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1760701AbcDMN0q (ORCPT ); Wed, 13 Apr 2016 09:26:46 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:45305 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758517AbcDMN0p (ORCPT ); Wed, 13 Apr 2016 09:26:45 -0400 Subject: Re: [PATCH v2 1/2] dt-bindings: phy-mt65xx-usb: add support for mt2701 platform To: Chunfeng Yun References: <1460360490-18606-1-git-send-email-chunfeng.yun@mediatek.com> CC: , , , , Rob Herring From: Kishon Vijay Abraham I Message-ID: <570E48EA.4030907@ti.com> Date: Wed, 13 Apr 2016 18:56:02 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.3.0 MIME-Version: 1.0 In-Reply-To: <1460360490-18606-1-git-send-email-chunfeng.yun@mediatek.com> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Monday 11 April 2016 01:11 PM, Chunfeng Yun wrote: > A new compatible string, "mediatek,mt2701-u3phy", is added. how about changing the commit log to something like below? Add a new compatible string for "mt2701" Thanks Kishon > > Signed-off-by: Chunfeng Yun > --- > .../devicetree/bindings/phy/phy-mt65xx-usb.txt | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/phy/phy-mt65xx-usb.txt b/Documentation/devicetree/bindings/phy/phy-mt65xx-usb.txt > index 00100cf..33a2b1e 100644 > --- a/Documentation/devicetree/bindings/phy/phy-mt65xx-usb.txt > +++ b/Documentation/devicetree/bindings/phy/phy-mt65xx-usb.txt > @@ -4,7 +4,9 @@ mt65xx USB3.0 PHY binding > This binding describes a usb3.0 phy for mt65xx platforms of Medaitek SoC. > > Required properties (controller (parent) node): > - - compatible : should be "mediatek,mt8173-u3phy" > + - compatible : should be one of > + "mediatek,mt2701-u3phy" > + "mediatek,mt8173-u3phy" > - reg : offset and length of register for phy, exclude port's > register. > - clocks : a list of phandle + clock-specifier pairs, one for each >