From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751735AbcDRE5T (ORCPT ); Mon, 18 Apr 2016 00:57:19 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:38224 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751091AbcDRE5S (ORCPT ); Mon, 18 Apr 2016 00:57:18 -0400 Subject: Re: [PATCH 2/2] ARM: davinci: da850: use clk->set_parent for async3 To: David Lechner References: <1460661217-7389-1-git-send-email-david@lechnology.com> <1460661217-7389-3-git-send-email-david@lechnology.com> <5712930F.7000902@lechnology.com> CC: Kevin Hilman , Russell King , , From: Sekhar Nori Message-ID: <571468D4.3090805@ti.com> Date: Mon, 18 Apr 2016 10:25:48 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.6.0 MIME-Version: 1.0 In-Reply-To: <5712930F.7000902@lechnology.com> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sunday 17 April 2016 01:01 AM, David Lechner wrote: >> +static int da850_async3_set_parent(struct clk *clk, struct clk *parent) >> +{ >> + u32 val; >> + >> + val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG)); >> + >> + /* Set the USB 1.1 PHY clock mux based on the parent clock. */ > > I seem to have regressed here since the last revision, this is supposed > to read: > > /* Set the async3 clock domain mux based on the parent clock. */ > > Although now that I am looking at it again, it doesn't really add > anything useful and could be omitted altogether. Agree the comment is redundant. No need resend just for this though. I can drop it when applying. Thanks, Sekhar