From: Suzuki K Poulose <Suzuki.Poulose@arm.com>
To: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: "linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH V2 13/15] coresight: tmc: implementing TMC-ETF AUX space API
Date: Tue, 19 Apr 2016 17:50:49 +0100 [thread overview]
Message-ID: <571661E9.5000007@arm.com> (raw)
In-Reply-To: <CANLsYkz4NSNbLHUH6c+6oCo-3cxrHQ9eP9E=JACQ5qymMF0qaQ@mail.gmail.com>
On 19/04/16 17:45, Mathieu Poirier wrote:
> On 19 April 2016 at 10:16, Suzuki K Poulose <Suzuki.Poulose@arm.com> wrote:
>> On 12/04/16 18:54, Mathieu Poirier wrote:
>>>
>>> This patch implement the AUX area interfaces required to
>>> use the TMC (configured as an ETF) from the Perf sub-system.
>>>
>>> The heuristic is heavily borrowed from the ETB10 implementation.
>>>
>>> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
>>> ---
>>> drivers/hwtracing/coresight/coresight-tmc-etf.c | 198
>>> ++++++++++++++++++++++++
>>> drivers/hwtracing/coresight/coresight-tmc.h | 21 +++
>>> 2 files changed, 219 insertions(+)
>>>
>>> diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c
>>> b/drivers/hwtracing/coresight/coresight-tmc-etf.c
>>> index a440784e3b27..fff175d4020d 100644
>>> --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c
>>> +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c
>>> @@ -15,7 +15,9 @@
>>> * this program. If not, see <http://www.gnu.org/licenses/>.
>>> */
>>>
>>> +#include <linux/circ_buf.h>
>>> #include <linux/coresight.h>
>>> +#include <linux/perf_event.h>
>>> #include <linux/slab.h>
>>> #include "coresight-priv.h"
>>> #include "coresight-tmc.h"
>>> @@ -295,9 +297,205 @@ static void tmc_disable_etf_link(struct
>>> coresight_device *csdev,
>>> dev_info(drvdata->dev, "TMC disabled\n");
>>> }
>>>
>>> +static void *tmc_alloc_etf_buffer(struct coresight_device *csdev, int
>>> cpu,
>>> + void **pages, int nr_pages, bool
>>> overwrite)
>>
>>
>>
>>
>>> +
>>> +static void tmc_free_etf_buffer(void *config)
>>> +{
>>
>>
>>> +
>>> +static int tmc_set_etf_buffer(struct coresight_device *csdev,
>>> + struct perf_output_handle *handle,
>>> + void *sink_config)
>>
>>
>>
>>> +static unsigned long tmc_reset_etf_buffer(struct coresight_device *csdev,
>>> + struct perf_output_handle
>>> *handle,
>>> + void *sink_config, bool *lost)
>>> +{
>>
>>
>>
>>> /**
>>> + * struct cs_buffer - keep track of a recording session' specifics
>>> + * @cur: index of the current buffer
>>> + * @nr_pages: max number of pages granted to us
>>> + * @offset: offset within the current buffer
>>> + * @data_size: how much we collected in this run
>>> + * @lost: other than zero if we had a HW buffer wrap around
>>> + * @snapshot: is this run in snapshot mode
>>> + * @data_pages: a handle the ring buffer
>>> + */
>>> +struct cs_tmc_buffers {
>>> + unsigned int cur;
>>> + unsigned int nr_pages;
>>> + unsigned long offset;
>>> + local_t data_size;
>>> + local_t lost;
>>> + bool snapshot;
>>> + void **data_pages;
>>> +};
>>
>>
>>
>> All of the above look exactly the same as what we have in etb10.c (as you
>> have mentioned).
>> Is there any chance we could reuse them under a generic name ?
>
> I toyed with the idea many times...
>
> Today the structures are similar and can be used in both drivers but
> it is only a matter for time (probably months) before someone adds new
> functionality on one side that isn't compatible with the other side.
> When that happens we'll get a bloated struct with fields that aren't
> used, depending on where it gets instantiated. Or the struct will be
> split again, coming back to what we have today.
>
If that happens in future, we know what to do now :)
>>> + * Make sure the new size is aligned in accordance with
>>> the
>>> + * requirement explained above.
>>> + */
>>> + to_read -= handle->size & mask;
>>
>>
>> Shouldn't this be :
>>
>> to_read = handle->size & mask;
>
> You are correct.
This applies to the etb10 code as well. So you might want to fix that as well.
Cheers
Suzuki
next prev parent reply other threads:[~2016-04-19 16:50 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-12 17:54 [PATCH V2 00/15] coresight: tmc: make driver usable by Perf Mathieu Poirier
2016-04-12 17:54 ` [PATCH V2 01/15] coresight: tmc: modifying naming convention Mathieu Poirier
2016-04-14 17:01 ` Suzuki K Poulose
2016-04-12 17:54 ` [PATCH V2 02/15] coresight: tmc: waiting for TMCReady bit before programming Mathieu Poirier
2016-04-14 17:05 ` Suzuki K Poulose
2016-04-12 17:54 ` [PATCH V2 03/15] coresight: tmc: re-implementing tmc_read_prepare/unprepare() functions Mathieu Poirier
2016-04-14 17:11 ` Suzuki K Poulose
2016-04-15 15:40 ` Mathieu Poirier
2016-04-15 17:41 ` Suzuki K Poulose
2016-04-12 17:54 ` [PATCH V2 04/15] coresight: tmc: introducing new header file Mathieu Poirier
2016-04-14 17:33 ` Suzuki K Poulose
2016-04-15 16:03 ` Mathieu Poirier
2016-04-15 16:08 ` Suzuki K Poulose
2016-04-15 16:15 ` Mathieu Poirier
2016-04-15 16:18 ` Suzuki K Poulose
2016-04-12 17:54 ` [PATCH V2 05/15] coresight: tmc: splitting driver in ETB/ETF and ETR components Mathieu Poirier
2016-04-19 12:20 ` Suzuki K Poulose
2016-04-19 15:14 ` Mathieu Poirier
2016-04-12 17:54 ` [PATCH V2 06/15] coresight: tmc: making prepare/unprepare functions generic Mathieu Poirier
2016-04-19 12:30 ` Suzuki K Poulose
2016-04-19 15:22 ` Mathieu Poirier
2016-04-19 15:32 ` Suzuki K Poulose
2016-04-12 17:54 ` [PATCH V2 07/15] coresight: tmc: allocating memory when needed Mathieu Poirier
2016-04-19 12:55 ` Suzuki K Poulose
2016-04-19 13:14 ` Suzuki K Poulose
2016-04-19 15:39 ` Mathieu Poirier
2016-04-12 17:54 ` [PATCH V2 08/15] coresight: tmc: getting the right read_count on tmc_open() Mathieu Poirier
2016-04-19 13:07 ` Suzuki K Poulose
2016-04-12 17:54 ` [PATCH V2 09/15] coresight: tmc: adding mode of operation for link/sinks Mathieu Poirier
2016-04-19 13:19 ` Suzuki K Poulose
2016-04-19 15:45 ` Mathieu Poirier
2016-04-19 15:49 ` Suzuki K Poulose
2016-04-12 17:54 ` [PATCH V2 10/15] coresight: tmc: dump system memory content only when needed Mathieu Poirier
2016-04-12 17:54 ` [PATCH V2 11/15] coresight: tmc: make sysFS and Perf mode mutually exclusive Mathieu Poirier
2016-04-19 13:42 ` Suzuki K Poulose
2016-04-19 16:16 ` Mathieu Poirier
2016-04-12 17:54 ` [PATCH V2 12/15] coresight: tmc: keep track of memory width Mathieu Poirier
2016-04-14 11:19 ` Suzuki K Poulose
2016-04-15 16:10 ` Mathieu Poirier
2016-04-12 17:54 ` [PATCH V2 13/15] coresight: tmc: implementing TMC-ETF AUX space API Mathieu Poirier
2016-04-19 16:16 ` Suzuki K Poulose
2016-04-19 16:45 ` Mathieu Poirier
2016-04-19 16:50 ` Suzuki K Poulose [this message]
2016-04-12 17:54 ` [PATCH V2 14/15] coresight: tmc: implementing TMC-ETR " Mathieu Poirier
2016-04-21 16:10 ` Suzuki K Poulose
2016-04-21 22:00 ` Mathieu Poirier
2016-04-12 17:54 ` [PATCH V2 15/15] coresight: configuring ETF in FIFO mode when acting as link Mathieu Poirier
2016-04-21 12:53 ` Suzuki K Poulose
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=571661E9.5000007@arm.com \
--to=suzuki.poulose@arm.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mathieu.poirier@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox