From: Eric Auger <eric.auger@linaro.org>
To: Robin Murphy <robin.murphy@arm.com>,
eric.auger@st.com, alex.williamson@redhat.com,
will.deacon@arm.com, joro@8bytes.org, tglx@linutronix.de,
jason@lakedaemon.net, marc.zyngier@arm.com,
christoffer.dall@linaro.org,
linux-arm-kernel@lists.infradead.org
Cc: patches@linaro.org, linux-kernel@vger.kernel.org,
Bharat.Bhushan@freescale.com, pranav.sawargaonkar@gmail.com,
p.fedin@samsung.com, iommu@lists.linux-foundation.org,
Jean-Philippe.Brucker@arm.com, julien.grall@arm.com
Subject: Re: [PATCH v7 01/10] iommu: Add DOMAIN_ATTR_MSI_MAPPING attribute
Date: Fri, 22 Apr 2016 14:00:51 +0200 [thread overview]
Message-ID: <571A1273.9060808@linaro.org> (raw)
In-Reply-To: <571A0B78.6070509@arm.com>
Hi Robin,
On 04/22/2016 01:31 PM, Robin Murphy wrote:
> On 20/04/16 16:58, Eric Auger wrote:
>> Hi Robin,
>> On 04/20/2016 02:47 PM, Robin Murphy wrote:
>>> Hi Eric,
>>>
>>> On 19/04/16 17:56, Eric Auger wrote:
>>>> Introduce a new DOMAIN_ATTR_MSI_MAPPING domain attribute. If supported,
>>>> this means the MSI addresses need to be mapped in the IOMMU.
>>>>
>>>> x86 IOMMUs typically don't expose the attribute since on x86, MSI write
>>>> transaction addresses always are within the 1MB PA region [FEE0_0000h -
>>>> FEF0_000h] window which directly targets the APIC configuration
>>>> space and
>>>> hence bypass the sMMU. On ARM and PowerPC however MSI transactions are
>>>> conveyed through the IOMMU.
>>>
>>> What's stopping us from simply inferring this from the domain's IOMMU
>>> not advertising interrupt remapping capabilities?
>> My current understanding is it is not possible:
>> on x86 CAP_INTR_REMAP is not systematically exposed (the feature can be
>> disabled) and MSIs are never mapped in the IOMMU I think.
>
> Not sure I follow - if the feature is disabled such that the IOMMU
> doesn't isolate MSIs, then it's no different a situation from the SMMU, no?
sorry I understood you wanted to use IOMMU_CAP_INTR_REMAP as the sole
criteria to detect whether MSI mapping was requested.
>
> My point was that this logic:
>
> if (IOMMU_CAP_INTR_REMAP)
> we're good
> else if (DOMAIN_ATTR_MSI_MAPPING)
> if (acquire_msi_remapping_resources(domain))
> we're good
> else
> oh no!
> else
> oh no!
>
> should be easily reducible to this:
>
> if (IOMMU_CAP_INTR_REMAP)
> we're good
> else if (acquire_msi_remapping_resources(domain))
But Can't we imagine a mix of smmus on the same platform, some
requesting MSI mapping and some which don't. As soon as an smmu requires
MSI mapping, CONFIG_IOMMU_DMA_RESERVED is set and
acquire_msi_remapping_resources(domain) will be implemented & succeed.
Doesn't it lead to a wrong decision. Do I miss something, or do you
consider this situation as far-fetched?
Thanks
Eric
> we're good
> else
> oh no! // Don't care whether the domain ran out of
> // resources or simply doesn't support it,
> // either way we can't proceed.
>
> Robin.
>
>> Best Regards
>>
>> Eric
>>>
>>> Robin.
>>>
>>>> Signed-off-by: Bharat Bhushan <Bharat.Bhushan@freescale.com>
>>>> Signed-off-by: Eric Auger <eric.auger@linaro.org>
>>>>
>>>> ---
>>>>
>>>> v4 -> v5:
>>>> - introduce the user in the next patch
>>>>
>>>> RFC v1 -> v1:
>>>> - the data field is not used
>>>> - for this attribute domain_get_attr simply returns 0 if the
>>>> MSI_MAPPING
>>>> capability if needed or <0 if not.
>>>> - removed struct iommu_domain_msi_maps
>>>> ---
>>>> include/linux/iommu.h | 1 +
>>>> 1 file changed, 1 insertion(+)
>>>>
>>>> diff --git a/include/linux/iommu.h b/include/linux/iommu.h
>>>> index 62a5eae..b3e8c5b 100644
>>>> --- a/include/linux/iommu.h
>>>> +++ b/include/linux/iommu.h
>>>> @@ -113,6 +113,7 @@ enum iommu_attr {
>>>> DOMAIN_ATTR_FSL_PAMU_ENABLE,
>>>> DOMAIN_ATTR_FSL_PAMUV1,
>>>> DOMAIN_ATTR_NESTING, /* two stages of translation */
>>>> + DOMAIN_ATTR_MSI_MAPPING, /* Require MSIs mapping in iommu */
>>>> DOMAIN_ATTR_MAX,
>>>> };
>>>>
>>>>
>>>
>>
>
next prev parent reply other threads:[~2016-04-22 12:02 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-19 16:56 [PATCH v7 00/10] KVM PCIe/MSI passthrough on ARM/ARM64: kernel part 1/3: iommu changes Eric Auger
2016-04-19 16:56 ` [PATCH v7 01/10] iommu: Add DOMAIN_ATTR_MSI_MAPPING attribute Eric Auger
2016-04-20 12:47 ` Robin Murphy
2016-04-20 15:58 ` Eric Auger
2016-04-22 11:31 ` Robin Murphy
2016-04-22 12:00 ` Eric Auger [this message]
2016-04-22 14:49 ` Robin Murphy
2016-04-22 15:33 ` Eric Auger
2016-04-19 16:56 ` [PATCH v7 02/10] iommu/arm-smmu: advertise " Eric Auger
2016-04-19 16:56 ` [PATCH v7 03/10] iommu: introduce a reserved iova cookie Eric Auger
2016-04-20 12:55 ` Robin Murphy
2016-04-20 16:14 ` Eric Auger
2016-04-22 12:36 ` Robin Murphy
2016-04-22 13:02 ` Eric Auger
2016-04-22 14:53 ` Eric Auger
2016-04-19 16:56 ` [PATCH v7 04/10] iommu/dma-reserved-iommu: alloc/free_reserved_iova_domain Eric Auger
2016-04-20 13:03 ` Robin Murphy
2016-04-20 13:11 ` Eric Auger
2016-04-19 16:56 ` [PATCH v7 05/10] iommu/dma-reserved-iommu: reserved binding rb-tree and helpers Eric Auger
2016-04-20 13:12 ` Robin Murphy
2016-04-20 16:18 ` Eric Auger
2016-04-22 13:05 ` Robin Murphy
2016-04-19 16:56 ` [PATCH v7 06/10] iommu/dma-reserved-iommu: iommu_get/put_reserved_iova Eric Auger
2016-04-20 16:58 ` Robin Murphy
2016-04-21 8:43 ` Eric Auger
2016-04-19 16:56 ` [PATCH v7 07/10] iommu/dma-reserved-iommu: delete bindings in iommu_free_reserved_iova_domain Eric Auger
2016-04-20 17:05 ` Robin Murphy
2016-04-21 8:40 ` Eric Auger
2016-04-19 16:56 ` [PATCH v7 08/10] iommu/dma-reserved_iommu: iommu_msi_mapping_desc_to_domain Eric Auger
2016-04-20 17:19 ` Robin Murphy
2016-04-21 8:40 ` Eric Auger
2016-04-19 16:56 ` [PATCH v7 09/10] iommu/dma-reserved-iommu: iommu_msi_mapping_translate_msg Eric Auger
2016-04-20 9:38 ` Marc Zyngier
2016-04-20 12:50 ` Eric Auger
2016-04-20 17:28 ` Robin Murphy
2016-04-21 8:40 ` Eric Auger
2016-04-19 16:56 ` [PATCH v7 10/10] iommu/arm-smmu: call iommu_free_reserved_iova_domain on domain destruction Eric Auger
2016-04-20 17:35 ` Robin Murphy
2016-04-21 8:39 ` Eric Auger
2016-04-21 12:18 ` [PATCH v7 00/10] KVM PCIe/MSI passthrough on ARM/ARM64: kernel part 1/3: iommu changes Eric Auger
2016-04-21 19:32 ` Alex Williamson
2016-04-22 12:31 ` Eric Auger
2016-04-22 19:07 ` Alex Williamson
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