From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755430AbcECHkw (ORCPT ); Tue, 3 May 2016 03:40:52 -0400 Received: from foss.arm.com ([217.140.101.70]:36302 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750732AbcECHkv (ORCPT ); Tue, 3 May 2016 03:40:51 -0400 Subject: Re: [PATCH] irqchip, gicv3-its, numa: Enable Cavium ThunderX #23144 workaround for ACPI To: Robert Richter , Thomas Gleixner , Jason Cooper References: <1462207100-4373-1-git-send-email-rrichter@caviumnetworks.com> Cc: Will Deacon , Tomasz Nowicki , David Daney , Ashok Kumar , Robert Richter , linux-kernel@vger.kernel.org From: Marc Zyngier X-Enigmail-Draft-Status: N1110 Organization: ARM Ltd Message-ID: <572855FF.4030207@arm.com> Date: Tue, 3 May 2016 08:40:47 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Icedove/38.7.0 MIME-Version: 1.0 In-Reply-To: <1462207100-4373-1-git-send-email-rrichter@caviumnetworks.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Robert, On 02/05/16 17:38, Robert Richter wrote: > From: Robert Richter > > In case of acpi the firmware does not provide node ids for cpus and > its devices. Determine it from system topology special to Cavium > ThunderX systems. This enables #23144 workaround for ACPI. > > Signed-off-by: Robert Richter > --- > drivers/irqchip/irq-gic-v3-its.c | 19 +++++++++++++++---- > 1 file changed, 15 insertions(+), 4 deletions(-) > > diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c > index 494395274cf7..6eac0f3c1e56 100644 > --- a/drivers/irqchip/irq-gic-v3-its.c > +++ b/drivers/irqchip/irq-gic-v3-its.c > @@ -1107,11 +1107,13 @@ static void its_cpu_init_collection(void) > > /* avoid cross node collections and its mapping */ > if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { > - struct device_node *cpu_node; > - > - cpu_node = of_get_cpu_node(cpu, NULL); > + int nid = of_node_to_nid(of_get_cpu_node(cpu, NULL)); > + if (nid == NUMA_NO_NODE) { > + pr_warn_once("ITS: Updating cpu numa node ids\n"); I don't really understand the meaning of that message. What are you updating here? > + nid = MPIDR_AFFINITY_LEVEL(read_cpuid_mpidr(), 2); > + } > if (its->numa_node != NUMA_NO_NODE && > - its->numa_node != of_node_to_nid(cpu_node)) So you're going from something that was relatively generic (of_node_to_nid) to something that is now completely hardcoding the Cavium view of CPU topology. Doesn't ACPI have similar abstractions? > + its->numa_node != nid) > continue; > } > > @@ -1443,6 +1445,15 @@ static void __maybe_unused its_enable_quirk_cavium_23144(void *data) > { > struct its_node *its = data; > > + if (!IS_ENABLED(CONFIG_NUMA)) > + return; > + > + if (its->numa_node == NUMA_NO_NODE) { > + /* make ACPI work */ > + its->numa_node = (its->phys_base >> 44) & 0x3; How is that ACPI specific? > + pr_warn_once("ITS: Updating ITS numa node ids\n"); > + } > + > its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144; > } > > Thanks, M. -- Jazz is not dead. It just smells funny...