From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933453AbcECNMK (ORCPT ); Tue, 3 May 2016 09:12:10 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:19623 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932762AbcECNMI (ORCPT ); Tue, 3 May 2016 09:12:08 -0400 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Tue, 03 May 2016 06:11:32 -0700 Subject: Re: [PATCH 3/6] soc/tegra: pmc: Add support for IO pads power state and voltage To: Laxman Dewangan , , , , , , References: <1462191434-28933-1-git-send-email-ldewangan@nvidia.com> <1462191434-28933-4-git-send-email-ldewangan@nvidia.com> <57289AC0.4090604@nvidia.com> <57289A2B.7040501@nvidia.com> <57289FB5.5040705@nvidia.com> <57289E35.8040400@nvidia.com> CC: , , , From: Jon Hunter Message-ID: <5728A3A1.2030304@nvidia.com> Date: Tue, 3 May 2016 14:12:01 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.7.2 MIME-Version: 1.0 In-Reply-To: <57289E35.8040400@nvidia.com> X-Originating-IP: [10.21.132.133] X-ClientProxiedBy: UKMAIL102.nvidia.com (10.26.138.15) To UKMAIL101.nvidia.com (10.26.138.13) Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 03/05/16 13:48, Laxman Dewangan wrote: > > On Tuesday 03 May 2016 06:25 PM, Jon Hunter wrote: >> >>> >>> Currently SOR driver is using the tegra_io_rail_power_off/on() APIs. >>> Once the proper interface available then I will move sor driver to use >>> new method and then we can full get rid of older APIs and macros. >>> >>> Till that, we need to have this. >> I prefer it is done before this series. In other words, if we need a >> proper enum for the rail/pad IDs then add one and convert any existing >> drivers over to use any new APIs first. > > But the converting to new API can be done after this patch only. Yes but before you add the pinctrl driver. May be you should separate the two. My point is that any follow-up series to this, would have to touch the pmc and the sor driver. So why not make the changes for the pmc and sor now, and once in place then add the pinctrl driver? Jon