From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933386AbcECNdf (ORCPT ); Tue, 3 May 2016 09:33:35 -0400 Received: from hqemgate14.nvidia.com ([216.228.121.143]:7849 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933291AbcECNdc (ORCPT ); Tue, 3 May 2016 09:33:32 -0400 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Tue, 03 May 2016 06:32:55 -0700 Subject: Re: [PATCH 5/6] pinctrl: tegra: Add DT binding for io pads control To: Laxman Dewangan , , , , , , References: <1462191434-28933-1-git-send-email-ldewangan@nvidia.com> <1462191434-28933-6-git-send-email-ldewangan@nvidia.com> <57289D3D.40301@nvidia.com> <57289F88.6040203@nvidia.com> CC: , , , From: Jon Hunter Message-ID: <5728A8A5.4080603@nvidia.com> Date: Tue, 3 May 2016 14:33:25 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.7.2 MIME-Version: 1.0 In-Reply-To: <57289F88.6040203@nvidia.com> X-Originating-IP: [10.21.132.133] X-ClientProxiedBy: UKMAIL101.nvidia.com (10.26.138.13) To UKMAIL101.nvidia.com (10.26.138.13) Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 03/05/16 13:54, Laxman Dewangan wrote: > > On Tuesday 03 May 2016 06:14 PM, Jon Hunter wrote: >> On 02/05/16 13:17, Laxman Dewangan wrote: >>> + >>> +The voltage supported on the pads are 1.8V and 3.3V. The enums are >>> defined as: >>> + For 1.8V, use TEGRA_IO_PAD_POWER_SOURCE_1800000UV >>> + For 3.3V, use TEGRA_IO_PAD_POWER_SOURCE_3300000UV >> Are these still necessary now that the driver is using uV? Can't we just >> use integer values for 1800000 and 3300000 in the DTS directly? >> > The config param and value are packed in u32 with 16bit each So we can > not make uV in 16bit until we do conversion of uV->mV. > Hence suggestion came from Stephen that we can have enum for Nvidia > specific and what actually it supports by HW. HW does not support any > other voltage. Ah yes I see. > >>> +Required subnode-properties: >>> +========================== >>> +- pins : An array of strings. Each string contains the name of an IO >>> pads. Valid >>> + values for these names are listed below. >> Please see my previous comments. > > This is taken from other dt binding docs for description. We can have > array of string. OK. > As all value of pins are not supporting all property and hence I > explicitly wrote under properties. I don't find it very clear. I thought all pins support the low power modes so I think it is clearer to list all the pin names under the pins description. >>> +Optional subnode-properties: >>> +========================== >>> +-nvidia,power-source-voltage: Integer. The voltage level of IO >>> pads. The >> I think I prefer nvidia,io-voltage or something. You can describe what >> this means in this doc. In fact, the current description here does not >> explicitly state that this voltage, is the voltage the pad is configured >> to operate at versus the voltage of the IO rail. > > Linus suggested this dt property name to make more readable and generic > and meaningful with other property :power-source. OK. Jon