From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934090AbcECP7U (ORCPT ); Tue, 3 May 2016 11:59:20 -0400 Received: from avon.wwwdotorg.org ([70.85.31.133]:45494 "EHLO avon.wwwdotorg.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933156AbcECP7R (ORCPT ); Tue, 3 May 2016 11:59:17 -0400 Subject: Re: [PATCH V5 0/4] gpio: tegra: Cleanups and support for debounce To: Laxman Dewangan , Linus Walleij References: <1461580714-22479-1-git-send-email-ldewangan@nvidia.com> <5723274B.3050209@nvidia.com> <57277C70.5080204@wwwdotorg.org> <57279534.5010409@nvidia.com> <5727A001.5030609@wwwdotorg.org> <5727A535.2060808@nvidia.com> Cc: Alexandre Courbot , Thierry Reding , "linux-gpio@vger.kernel.org" , "linux-tegra@vger.kernel.org" , "linux-kernel@vger.kernel.org" From: Stephen Warren Message-ID: <5728CAD2.9050701@wwwdotorg.org> Date: Tue, 3 May 2016 09:59:14 -0600 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.6.0 MIME-Version: 1.0 In-Reply-To: <5727A535.2060808@nvidia.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 05/02/2016 01:06 PM, Laxman Dewangan wrote: > > On Tuesday 03 May 2016 12:14 AM, Stephen Warren wrote: >> On 05/02/2016 11:58 AM, Laxman Dewangan wrote: >>> >>> >>> Toggling OE bit is something emulating the open drain here. >> >> From the perspective of the external HW that's attached to the GPIO, I >> believe there's no difference. >> >>> I think idea is that when we configure the pin in open drain then it >>> should be automatically handled by HW when we want to set pin state >>> high or low. When we set low, the pin should be driven and when high >>> then it should be tristated input. We should not need any direction bit >>> setting. >> >> I don't imagine anything in the kernel cares, so long as the correct >> logic level is present on the pin based on whatever GPIO API was last >> called. >> >> I'd be very surprised if there wasn't hardware that could only >> implement open-drain by this "emulation" method, so I'd be very >> surprised if something prohibited that implementation style. >> > > The emulation method implemented just to not drive high for open drain. > Recently, proper callback added for hw control for open drain and hence > emulation method is not needed for such HW. > > I think if HW support the callback to implement the open drain then use > the HW method otherwise fallback to emulation method. I don't see any benefit to that. It makes the code more complex without enabling any more features. For reference, on Tegra124 and earlier, very few pins have open-drain control in HW (pinmux) whereas you can emulate it in the GPIO module for any pin. In Tegra210 and Tegra186, many pins have open-drain control in HW (pinmux) yet a good number still don't, yet you can still emulate this in the GPIO module for any pin.