From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757364AbcEDHxC (ORCPT ); Wed, 4 May 2016 03:53:02 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:41482 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751378AbcEDHw7 (ORCPT ); Wed, 4 May 2016 03:52:59 -0400 Subject: Re: [PATCH 09/18] ASoC: sti: Update DT example to match the driver code To: Arnd Bergmann , Peter Griffin References: <1461236675-10176-1-git-send-email-peter.griffin@linaro.org> <6161197.8XCk69TI60@wuerfel> <20160426111532.GA5457@griffinp-ThinkPad-X1-Carbon-2nd> <5608365.uloflbeuqO@wuerfel> CC: , , , , , , , , , , From: Arnaud Pouliquen X-Enigmail-Draft-Status: N1110 Message-ID: <5729AA33.6020305@st.com> Date: Wed, 4 May 2016 09:52:19 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.6.0 MIME-Version: 1.0 In-Reply-To: <5608365.uloflbeuqO@wuerfel> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 8bit X-Originating-IP: [10.201.23.162] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2016-05-04_03:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org hello Arnd, peter, On 04/26/2016 01:44 PM, Arnd Bergmann wrote: > On Tuesday 26 April 2016 12:15:32 Peter Griffin wrote: >>> >>>> If not what would you recommend instead? >>> >>> It's still not clear to me what that bit in the syscfg register >>> is for. Given the error message about "sti-audio-clk-glue", >>> I suspect that this is actually a clock controller and that >>> it should be using the clock binding with a separate driver >>> instead of manipulating the regmap directly from the audio driver. >> >> Luckily I do have the datasheet for the audio-glue sysconf register. >> >> It says: - >> >> [11:8] PCM_CLK_SEL: Selects the frequency synthesizer clock or the external >> PCM clock for each channel. >> >> The driver only ever sets this to 1 which selects the frequency synthesizer >> clock. So the bitfield of the register which the driver is using (PCM_CLK_SEL) >> is a clock mux. > > Ok, that sounds like it could be either a really simple clock driver > with just a few lines, or integrated into an existing clock driver > if you already have one for this syscon node. > > Arnd > FYI, Name of this glue is related to the register name. But it does not concern only clock... This glue register is used to : - select clock source ( clock framework or external clock from GPIO) => one bit field per IP instance (player->clk_sel) - select uniperiph player IP instance for PCM out. (http://www.spinics.net/lists/alsa-devel/msg49034.html) Regards Arnaud