From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752811AbcEDMwU (ORCPT ); Wed, 4 May 2016 08:52:20 -0400 Received: from 7of9.schinagl.nl ([88.159.158.68]:47252 "EHLO 7of9.schinagl.nl" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750862AbcEDMwS (ORCPT ); Wed, 4 May 2016 08:52:18 -0400 Subject: Re: [PATCH 1/1] ARM: dts: sunxi: Add a olinuxino-lime2-emmc To: Radoslav Kolev , Chen-Yu Tsai References: <1461827998-12192-1-git-send-email-oliver@schinagl.nl> <57285162.2000704@schinagl.nl> Cc: Maxime Ripard , Tsvetan Usunov , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , Hans de Goede , dev , devicetree , linux-arm-kernel , linux-kernel From: Olliver Schinagl Message-ID: <5729F07C.3080308@schinagl.nl> Date: Wed, 4 May 2016 14:52:12 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Icedove/38.6.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hey Radoslav, On 04-05-16 14:30, Radoslav Kolev wrote: > 2016-05-03 10:25 GMT+03:00 Chen-Yu Tsai : >> On Tue, May 3, 2016 at 3:21 PM, Olliver Schinagl wrote: >>>>> + bus-width = <4>; >>>> Only 4 bits? We normally see eMMC with 8 bits. 4 bits are some kind of >>>> embedded SD card. >>> On A20 as well? Our investigations so far have concluded that the A10 and >>> A20 have those pins not mapped out to pads. The IP does support it however >>> we assume. >> You're right. My bad. First time A10/A20 sees eMMC support. > I can't say anything about A10/A20, but I have a board with A13 and > the same eMMC chip and it works fine in 8 bit mode. Yep, sun5i actually brings them all out to pads, the A20 however does not :( We first thought that the A20 would also be an 8bitter, because the mmc IP appears to be the same as sun5i, but initial tests show it is not. As for A10, it has older IP and it might not even support 8 bit mode, let alone bring out the pins. But with A20's + eMMC being available via the lime2, others may repeat my experiments! The lime2 is 8 bit connected. Olliver > > Regards, > Radoslav